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| author | Imre Deak <imre.deak@intel.com> | 2017-07-12 18:54:13 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-07-27 09:38:53 +0200 |
| commit | 001bd2cb17f7df768fb3a5c1e7c3d2cd2cfb3439 (patch) | |
| tree | b636e86661eae841800d0d4812b8e109068784f5 /certs | |
| parent | 1af474fef2697a1ab7e497627bddf026a3e767ac (diff) | |
| download | linux-001bd2cb17f7df768fb3a5c1e7c3d2cd2cfb3439.tar.bz2 | |
drm/i915/hsw, bdw: Add irq_pipe_mask, has_vga power well attributes
The pattern of a power well backing a set of pipe IRQ or VGA
functionality applies to all HSW+ platforms. Using power well attributes
instead of platform checks to decide whether to init/reset pipe IRQs and
VGA correspondingly is cleaner and it allows us to unify the HSW/BDW and
GEN9+ power well code in follow-up patches.
Also use u8 for pipe_mask in related helpers to match the type in the
power well struct.
v2:
- Use u8 instead of u32 for irq_pipe_mask. (Ville)
v3:
- Use u8 for pipe_mask in related helpers too for clarity.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170712155413.29839-1-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions