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| author | Leonard Crestez <leonard.crestez@nxp.com> | 2019-10-16 11:57:39 +0000 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2019-10-25 17:03:16 +0800 |
| commit | 3e4947acad32e6abf1ef3259a42fb4d690e4819a (patch) | |
| tree | 08213a7754c3f97c09f525d5c48e5fa44debb764 /certs | |
| parent | b04383b6a5588906ffd059a6a9f5344a9c6df58a (diff) | |
| download | linux-3e4947acad32e6abf1ef3259a42fb4d690e4819a.tar.bz2 | |
clk: imx8mm: Define gates for pll1/2 fixed dividers
On imx8mm there are 9 fixed-factor dividers for SYS_PLL1 and SYS_PLL2
each with their own gate. Only one of these gates (the one "dividing" by
one) is currently defined and it's incorrectly set as the parent of all
the fixed-factor dividers.
Add the other 8 gates to the clock tree between sys_pll1/2_bypass and
the fixed dividers.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions