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| author | Thomas Gleixner <tglx@linutronix.de> | 2019-02-23 10:53:31 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-02-23 10:53:31 +0100 |
| commit | a324ca9cad4736252c33c1e28cffe1d87f262d03 (patch) | |
| tree | da64e14dd8432602634773b52073928c50dfb85c /certs | |
| parent | 4e6b26d23dc1faee318796d5c7f91b5692b1e6be (diff) | |
| parent | 28528fca4908142bd1a3247956cba56c9c667d71 (diff) | |
| download | linux-a324ca9cad4736252c33c1e28cffe1d87f262d03.tar.bz2 | |
Merge tag 'irqchip-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier
- Core pseudo-NMI handling code
- Allow the default irq domain to be retrieved
- A new interrupt controller for the Loongson LS1X platform
- Affinity support for the SiFive PLIC
- Better support for the iMX irqsteer driver
- NUMA aware memory allocations for GICv3
- A handful of other fixes (i8259, GICv3, PLIC)
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions