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authorWilliam Wu <william.wu@rock-chips.com>2017-06-02 11:20:24 +0800
committerKishon Vijay Abraham I <kishon@ti.com>2017-06-06 14:50:23 +0530
commit5a74a8b74233f0e3c018d4e1c2a52e9393605f47 (patch)
tree8cf1cd96bf7df76bdea74d0b9ecea395b85a27e3 /block
parentfbbe98cd44508def1c6b7f98d5dc676d23bc9031 (diff)
downloadlinux-5a74a8b74233f0e3c018d4e1c2a52e9393605f47.tar.bz2
phy: rockchip-inno-usb2: increase otg sm work first schedule time
In rockchip-inno-usb2 phy driver, we use otg_sm_work to dynamically manage power consumption for phy otg-port. If the otg-port works as peripheral mode and does not communicate with usb host, we will suspend phy. But once suspend phy, the phy no longer has any internal clock running, include the utmi_clk which supplied for usb controller. So if we suspend phy before usb controller init, it will cause usb controller fail to initialize. Specifically, without this patch, the observed order is: 1. unplug usb cable 2. start system, do dwc2 controller probe 3. dwc2_lowlevel_hw_enable() - phy_init() - rockchip_usb2phy_init() - schedule otg_sm_work after 2s put phy in suspend, and close utmi_clk 4. dwc2_hsotg_udc_start() - fail to initialize the usb core Generally, dwc2_hsotg_udc_start() can be called within 5s after start system on Rockchip platform, so we increase the the first schedule delay time to 6s for otg_sm_work afer usb controller calls phy_init(), this can make sure that the usb controller completes initialization before phy enter suspend. Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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