diff options
author | Zhang Le <r0bertz@gentoo.org> | 2009-03-12 18:00:50 +0800 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-03-13 23:07:59 +0100 |
commit | 3b289d6e35a1a535c19a5b079f0500526754e650 (patch) | |
tree | 25e77201eed541e062a1f8cbcaddefe158ab701d /arch | |
parent | 041b62374c7fedc11a8a1eeda2868612d3d1436c (diff) | |
download | linux-3b289d6e35a1a535c19a5b079f0500526754e650.tar.bz2 |
MIPS: Fix TIF_32BIT undefined problem when seccomp is disabled
Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/seccomp.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/thread_info.h | 6 |
2 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/include/asm/seccomp.h b/arch/mips/include/asm/seccomp.h index a6772e9507f5..ae6306ebdcad 100644 --- a/arch/mips/include/asm/seccomp.h +++ b/arch/mips/include/asm/seccomp.h @@ -15,8 +15,6 @@ */ #ifdef CONFIG_MIPS32_O32 -#define TIF_32BIT TIF_32BIT_REGS - #define __NR_seccomp_read_32 4003 #define __NR_seccomp_write_32 4004 #define __NR_seccomp_exit_32 4001 @@ -24,8 +22,6 @@ #elif defined(CONFIG_MIPS32_N32) -#define TIF_32BIT _TIF_32BIT_ADDR - #define __NR_seccomp_read_32 6000 #define __NR_seccomp_write_32 6001 #define __NR_seccomp_exit_32 6058 diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 3f76de73c943..676aa2ae1913 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -127,6 +127,12 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define TIF_LOAD_WATCH 25 /* If set, load watch registers */ #define TIF_SYSCALL_TRACE 31 /* syscall trace active */ +#ifdef CONFIG_MIPS32_O32 +#define TIF_32BIT TIF_32BIT_REGS +#elif defined(CONFIG_MIPS32_N32) +#define TIF_32BIT _TIF_32BIT_ADDR +#endif /* CONFIG_MIPS32_O32 */ + #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) |