diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2011-11-08 10:34:10 -0800 |
---|---|---|
committer | David Brown <davidb@codeaurora.org> | 2011-11-10 10:36:34 -0800 |
commit | 27fdb577435e336e4b00b9e51626f9002b88a86c (patch) | |
tree | 74724584b0ede5becf3dafdee950071c4baec06e /arch | |
parent | dde7d61e7f9bf0e844df375412ec5d51650db486 (diff) | |
download | linux-27fdb577435e336e4b00b9e51626f9002b88a86c.tar.bz2 |
msm: timer: Use clockevents_config_and_register()
Don't open code the min/max delta logic. Use the generic
version instead. Also expand the number of bits we can handle
because there isn't anything that says we can't handle all 32
bits.
Before:
max_delta_ns: 122880426391799
min_delta_ns: 122070
mult: 140737
shift: 32
After:
max_delta_ns: 131071523464981
min_delta_ns: 122069
mult: 70369
shift: 31
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-msm/timer.c | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 3d80fbf34165..11d0d8f2656c 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -93,7 +93,6 @@ static void msm_timer_set_mode(enum clock_event_mode mode, static struct clock_event_device msm_clockevent = { .name = "gp_timer", .features = CLOCK_EVT_FEAT_ONESHOT, - .shift = 32, .rating = 200, .set_next_event = msm_timer_set_next_event, .set_mode = msm_timer_set_mode, @@ -161,18 +160,10 @@ static void __init msm_timer_init(void) writel_relaxed(0, event_base + TIMER_ENABLE); writel_relaxed(0, event_base + TIMER_CLEAR); writel_relaxed(~0, event_base + TIMER_MATCH_VAL); - ce->mult = div_sc(GPT_HZ, NSEC_PER_SEC, ce->shift); - /* - * allow at least 10 seconds to notice that the timer - * wrapped - */ - ce->max_delta_ns = clockevent_delta2ns(0xf0000000, ce); - /* 4 gets rounded down to 3 */ - ce->min_delta_ns = clockevent_delta2ns(4, ce); ce->cpumask = cpumask_of(0); ce->irq = INT_GP_TIMER_EXP; - clockevents_register_device(ce); + clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff); if (cpu_is_msm8x60() || cpu_is_msm8960()) { msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *); if (!msm_evt.percpu_evt) { |