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authorOlof Johansson <olof@lixom.net>2018-06-23 10:17:38 -0700
committerOlof Johansson <olof@lixom.net>2018-06-23 10:17:38 -0700
commit652caf4ab1e6ab9106c62a7b3b411cd67b72902f (patch)
tree5d15e5fc477d9a4c062a696cf0ecac8e2ee9ac1e /arch
parentcb04a7944505a0d4c8097ca7279555a8ce35000f (diff)
parent1bcfe0564044be578841744faea1c2f46adc8178 (diff)
downloadlinux-652caf4ab1e6ab9106c62a7b3b411cd67b72902f.tar.bz2
Merge tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.18: - Fix i.MX6SX PCIe MSI interrupt number, so that MSI IRQs can be properly propagated to the upstream interrupt controller. - Fix GPCv2 MIPI/PCIe/USB_HSIC's PGC offset. The values in Reference Manual are incorrect. - Correct SDMA setting for i.MX6Q SPI5 device to fix the issue, that the SPI controller RX FIFO was not empty after a DMA transfer, and the driver gets stuck in the next PIO transfer when reading one word more than expected. * tag 'imx-fixes-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6sx: fix irq for pcie bridge soc: imx: gpcv2: correct PGC offset ARM: dts: imx6q: Use correct SDMA script for SPI5 core Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 70483ce72ba6..77f8f030dd07 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -90,7 +90,7 @@
clocks = <&clks IMX6Q_CLK_ECSPI5>,
<&clks IMX6Q_CLK_ECSPI5>;
clock-names = "ipg", "per";
- dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
+ dmas = <&sdma 11 8 1>, <&sdma 12 8 2>;
dma-names = "rx", "tx";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index d8b94f47498b..4e4a55aad5c9 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1344,7 +1344,7 @@
ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;