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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-02-21 10:38:01 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-02-22 00:10:16 +1100 |
| commit | 451b3ec082c2fef31455261fb18d2676afb50c61 (patch) | |
| tree | f38f2d05dbd741a2c318ed750c8fdea20b92e22a /arch | |
| parent | f8b58c64eaef03946dbb1b100ba0255f72031c17 (diff) | |
| download | linux-451b3ec082c2fef31455261fb18d2676afb50c61.tar.bz2 | |
powerpc/603: Don't worry about _PAGE_USER in TLB miss handlers
PP bits take user access into account, so no need to check _PAGE_USER
here. A DSI or ISI will be generated if needed.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/kernel/head_32.S | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index b071f328b4b0..6b5cb7551a72 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S @@ -503,11 +503,9 @@ InstructionTLBMiss: cmplw 0,r1,r3 #endif mfspr r2, SPRN_SPRG_PGDIR - li r1,_PAGE_USER|_PAGE_PRESENT|_PAGE_EXEC /* low addresses tested as user */ + li r1,_PAGE_PRESENT | _PAGE_EXEC #if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC) bge- 112f - mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */ addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */ #endif @@ -573,10 +571,8 @@ DataLoadTLBMiss: lis r1,PAGE_OFFSET@h /* check if kernel address */ cmplw 0,r1,r3 mfspr r2, SPRN_SPRG_PGDIR - li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ + li r1, _PAGE_PRESENT bge- 112f - mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */ addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */ 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ @@ -653,10 +649,8 @@ DataStoreTLBMiss: lis r1,PAGE_OFFSET@h /* check if kernel address */ cmplw 0,r1,r3 mfspr r2, SPRN_SPRG_PGDIR - li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ + li r1, _PAGE_RW | _PAGE_PRESENT /* access flags */ bge- 112f - mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */ addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */ 112: rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ |