diff options
| author | Will Deacon <will.deacon@arm.com> | 2019-04-30 16:58:56 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2019-05-01 14:48:06 +0100 |
| commit | eb337cdfcd5dd3b10522c2f34140a73a4c285c30 (patch) | |
| tree | 6d180cde9a9dfc0e388063bca1b9da78dc7b6c7b /arch | |
| parent | 61ae1321f06c4489c724c803e9b8363dea576da3 (diff) | |
| download | linux-eb337cdfcd5dd3b10522c2f34140a73a4c285c30.tar.bz2 | |
arm64: ssbs: Don't treat CPUs with SSBS as unaffected by SSB
SSBS provides a relatively cheap mitigation for SSB, but it is still a
mitigation and its presence does not indicate that the CPU is unaffected
by the vulnerability.
Tweak the mitigation logic so that we report the correct string in sysfs.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 4bb0f7cad418..44ef98be001e 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -386,15 +386,17 @@ static bool has_ssbd_mitigation(const struct arm64_cpu_capabilities *entry, WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible()); + /* delay setting __ssb_safe until we get a firmware response */ + if (is_midr_in_range_list(read_cpuid_id(), entry->midr_range_list)) + this_cpu_safe = true; + if (this_cpu_has_cap(ARM64_SSBS)) { + if (!this_cpu_safe) + __ssb_safe = false; required = false; goto out_printmsg; } - /* delay setting __ssb_safe until we get a firmware response */ - if (is_midr_in_range_list(read_cpuid_id(), entry->midr_range_list)) - this_cpu_safe = true; - if (psci_ops.smccc_version == SMCCC_VERSION_1_0) { ssbd_state = ARM64_SSBD_UNKNOWN; if (!this_cpu_safe) |