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| author | Arnd Bergmann <arnd@arndb.de> | 2021-07-16 22:54:55 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-07-16 22:54:55 +0200 |
| commit | e0129a0e826eda3b61f094afe52fd742bbc1923a (patch) | |
| tree | 177ec808814542292898ceb1758ac84da63f6e90 /arch | |
| parent | b6e473d1e21262290b8e1a023eff9f091ab8041b (diff) | |
| parent | 432b52eea3dcf48083bafa4b2b6ef5b054ead609 (diff) | |
| download | linux-e0129a0e826eda3b61f094afe52fd742bbc1923a.tar.bz2 | |
Merge tag 'renesas-fixes-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes
Renesas fixes for v5.14
- Fix a clock/reset handling design issue on the new RZ/G2L SoC,
requiring an atomic change to DT binding definitions, clock driver,
and DTS,
- Restore graphical consoles in the shmobile_defconfig.
* tag 'renesas-fixes-for-v5.14-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: defconfig: Restore graphical consoles
dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions
clk: renesas: r9a07g044: Add P2 Clock support
clk: renesas: r9a07g044: Fix P1 Clock
clk: renesas: r9a07g044: Rename divider table
clk: renesas: rzg2l: Add multi clock PM support
Link: https://lore.kernel.org/r/cover.1626253929.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/configs/shmobile_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index 66c8b0980a0a..d9a27e4e0914 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -135,6 +135,7 @@ CONFIG_DRM_SII902X=y CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_I2C_ADV7511=y CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_FB=y CONFIG_FB_SH_MOBILE_LCDC=y CONFIG_BACKLIGHT_PWM=y CONFIG_BACKLIGHT_AS3711=y diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi index 734c8adeceba..01482d227506 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi @@ -82,10 +82,10 @@ <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; - clocks = <&cpg CPG_MOD R9A07G044_CLK_SCIF0>; + clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>; clock-names = "fck"; power-domains = <&cpg>; - resets = <&cpg R9A07G044_CLK_SCIF0>; + resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>; status = "disabled"; }; |