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authorDamien Le Moal <damien.lemoal@wdc.com>2020-12-13 22:50:36 +0900
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-01-07 18:04:25 -0800
commit643437b996bac9267785e0bd528332e2d5811067 (patch)
tree74d64129a077a3d02bcc6e4d52d5e203d23bc6a4 /arch
parent1f1496a923b6ba16679074fe77100e1b53cdb880 (diff)
downloadlinux-643437b996bac9267785e0bd528332e2d5811067.tar.bz2
riscv: Enable interrupts during syscalls with M-Mode
When running is M-Mode (no MMU config), MPIE does not get set. This results in all syscalls being executed with interrupts disabled as handle_exception never sets SR_IE as it always sees SR_PIE being cleared. Fix this by always force enabling interrupts in handle_syscall when CONFIG_RISCV_M_MODE is enabled. Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv/kernel/entry.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index d07763001eb0..48de316c68c1 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -155,6 +155,15 @@ skip_context_tracking:
tail do_trap_unknown
handle_syscall:
+#ifdef CONFIG_RISCV_M_MODE
+ /*
+ * When running is M-Mode (no MMU config), MPIE does not get set.
+ * As a result, we need to force enable interrupts here because
+ * handle_exception did not do set SR_IE as it always sees SR_PIE
+ * being cleared.
+ */
+ csrs CSR_STATUS, SR_IE
+#endif
#if defined(CONFIG_TRACE_IRQFLAGS) || defined(CONFIG_CONTEXT_TRACKING)
/* Recover a0 - a7 for system calls */
REG_L a0, PT_A0(sp)