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authorIcenowy Zheng <icenowy@aosc.io>2017-04-05 22:30:34 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-04-06 09:13:10 +0200
commit0d98479738b950e30bb4f782d60099d44076ad67 (patch)
treed7c780ae02edffac3e8f28880611ae4635aa7cd5 /arch
parentea33c2c2051a266f68d9cd920c789cec828c8f11 (diff)
downloadlinux-0d98479738b950e30bb4f782d60099d44076ad67.tar.bz2
arm64: allwinner: a64: add pmu0 regs for USB PHY
The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI controller pair that can be connected to the PHY0. Add the MMIO region for PHY node. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1c64ea2d23f9..0565779e66fa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -179,8 +179,10 @@
usbphy: phy@01c19400 {
compatible = "allwinner,sun50i-a64-usb-phy";
reg = <0x01c19400 0x14>,
+ <0x01c1a800 0x4>,
<0x01c1b800 0x4>;
reg-names = "phy_ctrl",
+ "pmu0",
"pmu1";
clocks = <&ccu CLK_USB_PHY0>,
<&ccu CLK_USB_PHY1>;