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authorRoger Quadros <rogerq@ti.com>2015-01-13 14:23:21 +0200
committerTony Lindgren <tony@atomide.com>2015-02-24 08:15:53 -0800
commit773c5a0fca5b08af7cce87785e4a99b4c1ac36bf (patch)
tree8ea40aee64f41775032591cd8f990ccc487742e6 /arch
parentc517d838eb7d07bbe9507871fab3931deccff539 (diff)
downloadlinux-773c5a0fca5b08af7cce87785e4a99b4c1ac36bf.tar.bz2
ARM: dts: DRA7: Fix SATA PHY node
The sata_ref_clk is a reference clock to the SATA phy. This fixes SATA malfunction across suspend/resume or when SATA driver is used as a module. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fedafd43..853d37d96007 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1090,8 +1090,8 @@
<0x4A096800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
ctrl-module = <&omap_control_sata>;
- clocks = <&sys_clkin1>;
- clock-names = "sysclk";
+ clocks = <&sys_clkin1>, <&sata_ref_clk>;
+ clock-names = "sysclk", "refclk";
#phy-cells = <0>;
};