diff options
author | Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> | 2013-09-10 18:59:49 +0100 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2013-09-19 03:53:44 +0200 |
commit | e4a6a29d1250022a885123cc0a04bd176b508854 (patch) | |
tree | 2848f4750429df78dcc74e2db227e6ee66bf5204 /arch | |
parent | 3d10a887de7ffe704687c9a77abaac9fbe5e9208 (diff) | |
download | linux-e4a6a29d1250022a885123cc0a04bd176b508854.tar.bz2 |
ARM: shmobile: change dev_id to cpu0 while registering cpu clock
Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
for cpu clock which refers to virtual platform device. It needs to
be "cpu0" instead which is actual cpu0 device id.
This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".
Reported-and-tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a73a4.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-sh73a0.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c index 8ea5ef6c79cc..5bd2e851e3c7 100644 --- a/arch/arm/mach-shmobile/clock-r8a73a4.c +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c @@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("pll2h", &pll2h_clk), /* CPU clock */ - CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk), + CLKDEV_DEV_ID("cpu0", &z_clk), /* DIV6 */ CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]), diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 1942eaef5181..c92c023f0d27 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */ /* DIV4 clocks */ - CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]), + CLKDEV_DEV_ID("cpu0", &div4_clks[DIV4_Z]), /* DIV6 clocks */ CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]), |