diff options
| author | Heiko Carstens <heiko.carstens@de.ibm.com> | 2005-07-29 14:03:36 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-29 15:01:14 -0700 |
| commit | 350e3ade9ed0809a94c51db6ee66883a35f0d6c9 (patch) | |
| tree | 8c644bec7a82bdb2b4c0c9d30e65fce4b8c15f69 /arch | |
| parent | 5712f52e8c024c6b7b82ae5c7b5b3d0f3e6f711b (diff) | |
| download | linux-350e3ade9ed0809a94c51db6ee66883a35f0d6c9.tar.bz2 | |
[PATCH] s390: check for interrupt before waiting
The patch that introduced waiting for interrupts after resetting the reader
can cause the boot to fail because the system is waiting for an interrupt that
will never arrive. Add code to check if an interrupt is supposed to arrive
before waiting endlessly.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/s390/kernel/head.S | 7 | ||||
| -rw-r--r-- | arch/s390/kernel/head64.S | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S index d12cff11b4bc..2710e66fefba 100644 --- a/arch/s390/kernel/head.S +++ b/arch/s390/kernel/head.S @@ -346,6 +346,13 @@ iplstart: la %r2,.Lreset lhi %r3,26 diag %r2,%r3,8 + la %r5,.Lirb + stsch 0(%r5) # check if irq is pending + tm 30(%r5),0x0f # by verifying if any of the + bnz .Lwaitforirq # activity or status control + tm 31(%r5),0xff # bits is set in the schib + bz .Lnoreset +.Lwaitforirq: mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw .Lwaitrdrirq: lpsw .Lrdrwaitpsw diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S index 10bc592c3637..9a8263a153cb 100644 --- a/arch/s390/kernel/head64.S +++ b/arch/s390/kernel/head64.S @@ -345,6 +345,13 @@ iplstart: la %r2,.Lreset lhi %r3,26 diag %r2,%r3,8 + la %r5,.Lirb + stsch 0(%r5) # check if irq is pending + tm 30(%r5),0x0f # by verifying if any of the + bnz .Lwaitforirq # activity or status control + tm 31(%r5),0xff # bits is set in the schib + bz .Lnoreset +.Lwaitforirq: mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw .Lwaitrdrirq: lpsw .Lrdrwaitpsw |