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author | Max Filippov <jcmvbkbc@gmail.com> | 2018-08-20 13:24:24 -0700 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-08-20 13:24:24 -0700 |
commit | 35d231db53a60b76e218a56da30ad071d4717b56 (patch) | |
tree | f35e259ef6cda1a8a9cddc2c6840a2c28b1efeef /arch/xtensa | |
parent | bfd5bb6f90af092aa345b15cd78143956a13c2a8 (diff) | |
parent | 2cc15e802b250a11ece57ea54f82993cf3430867 (diff) | |
download | linux-35d231db53a60b76e218a56da30ad071d4717b56.tar.bz2 |
Merge branch 'xtensa-dma-fixes' (early part) into xtensa-fixes
This switches xtensa arch to the generic noncoherent direct mapping
operations, adds support for DMA_ATTR_NO_KERNEL_MAPPING attribute and
allows for platform-specific handling of coherent memory.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa')
-rw-r--r-- | arch/xtensa/Kconfig | 3 | ||||
-rw-r--r-- | arch/xtensa/include/asm/Kbuild | 1 | ||||
-rw-r--r-- | arch/xtensa/include/asm/dma-mapping.h | 26 | ||||
-rw-r--r-- | arch/xtensa/include/asm/kmem_layout.h | 6 | ||||
-rw-r--r-- | arch/xtensa/include/asm/pgtable.h | 8 | ||||
-rw-r--r-- | arch/xtensa/include/asm/platform.h | 27 | ||||
-rw-r--r-- | arch/xtensa/kernel/pci-dma.c | 193 |
7 files changed, 110 insertions, 154 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index bc766b6b6344..9e53ec481bf9 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -4,12 +4,15 @@ config ZONE_DMA config XTENSA def_bool y + select ARCH_HAS_SYNC_DMA_FOR_CPU + select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_NO_COHERENT_DMA_MMAP if !MMU select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT select CLONE_BACKWARDS select COMMON_CLK + select DMA_NONCOHERENT_OPS select GENERIC_ATOMIC64 select GENERIC_CLOCKEVENTS select GENERIC_IRQ_SHOW diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild index e5e1e61c538c..82c756431b49 100644 --- a/arch/xtensa/include/asm/Kbuild +++ b/arch/xtensa/include/asm/Kbuild @@ -3,6 +3,7 @@ generic-y += compat.h generic-y += device.h generic-y += div64.h generic-y += dma-contiguous.h +generic-y += dma-mapping.h generic-y += emergency-restart.h generic-y += exec.h generic-y += extable.h diff --git a/arch/xtensa/include/asm/dma-mapping.h b/arch/xtensa/include/asm/dma-mapping.h deleted file mode 100644 index 44098800dad7..000000000000 --- a/arch/xtensa/include/asm/dma-mapping.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003 - 2005 Tensilica Inc. - * Copyright (C) 2015 Cadence Design Systems Inc. - */ - -#ifndef _XTENSA_DMA_MAPPING_H -#define _XTENSA_DMA_MAPPING_H - -#include <asm/cache.h> -#include <asm/io.h> - -#include <linux/mm.h> -#include <linux/scatterlist.h> - -extern const struct dma_map_ops xtensa_dma_map_ops; - -static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) -{ - return &xtensa_dma_map_ops; -} - -#endif /* _XTENSA_DMA_MAPPING_H */ diff --git a/arch/xtensa/include/asm/kmem_layout.h b/arch/xtensa/include/asm/kmem_layout.h index 2317c835a4db..9c12babc016c 100644 --- a/arch/xtensa/include/asm/kmem_layout.h +++ b/arch/xtensa/include/asm/kmem_layout.h @@ -63,12 +63,6 @@ #error XCHAL_KSEG_PADDR is not properly aligned to XCHAL_KSEG_ALIGNMENT #endif -#else - -#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000) -#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000) -#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000) - #endif #ifndef CONFIG_KASAN diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index 38802259978f..29cfe421cf41 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -66,6 +66,7 @@ #define FIRST_USER_ADDRESS 0UL #define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT) +#ifdef CONFIG_MMU /* * Virtual memory area. We keep a distance to other memory regions to be * on the safe side. We also use this area for cache aliasing. @@ -80,6 +81,13 @@ #define TLBTEMP_SIZE ICACHE_WAY_SIZE #endif +#else + +#define VMALLOC_START __XTENSA_UL_CONST(0) +#define VMALLOC_END __XTENSA_UL_CONST(0xffffffff) + +#endif + /* * For the Xtensa architecture, the PTE layout is as follows: * diff --git a/arch/xtensa/include/asm/platform.h b/arch/xtensa/include/asm/platform.h index f8fbef67bc5f..560483356a06 100644 --- a/arch/xtensa/include/asm/platform.h +++ b/arch/xtensa/include/asm/platform.h @@ -75,4 +75,31 @@ extern void platform_calibrate_ccount (void); */ void cpu_reset(void) __attribute__((noreturn)); +/* + * Memory caching is platform-dependent in noMMU xtensa configurations. + * The following set of functions should be implemented in platform code + * in order to enable coherent DMA memory operations when CONFIG_MMU is not + * enabled. Default implementations do nothing and issue a warning. + */ + +/* + * Check whether p points to a cached memory. + */ +bool platform_vaddr_cached(const void *p); + +/* + * Check whether p points to an uncached memory. + */ +bool platform_vaddr_uncached(const void *p); + +/* + * Return pointer to an uncached view of the cached sddress p. + */ +void *platform_vaddr_to_uncached(void *p); + +/* + * Return pointer to a cached view of the uncached sddress p. + */ +void *platform_vaddr_to_cached(void *p); + #endif /* _XTENSA_PLATFORM_H */ diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c index 392b4a80ebc2..fe3343ddccaf 100644 --- a/arch/xtensa/kernel/pci-dma.c +++ b/arch/xtensa/kernel/pci-dma.c @@ -16,26 +16,25 @@ */ #include <linux/dma-contiguous.h> +#include <linux/dma-noncoherent.h> #include <linux/dma-direct.h> #include <linux/gfp.h> #include <linux/highmem.h> #include <linux/mm.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <linux/string.h> #include <linux/types.h> #include <asm/cacheflush.h> #include <asm/io.h> +#include <asm/platform.h> -static void do_cache_op(dma_addr_t dma_handle, size_t size, +static void do_cache_op(phys_addr_t paddr, size_t size, void (*fn)(unsigned long, unsigned long)) { - unsigned long off = dma_handle & (PAGE_SIZE - 1); - unsigned long pfn = PFN_DOWN(dma_handle); + unsigned long off = paddr & (PAGE_SIZE - 1); + unsigned long pfn = PFN_DOWN(paddr); struct page *page = pfn_to_page(pfn); if (!PageHighMem(page)) - fn((unsigned long)bus_to_virt(dma_handle), size); + fn((unsigned long)phys_to_virt(paddr), size); else while (size > 0) { size_t sz = min_t(size_t, size, PAGE_SIZE - off); @@ -49,14 +48,13 @@ static void do_cache_op(dma_addr_t dma_handle, size_t size, } } -static void xtensa_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) +void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, + size_t size, enum dma_data_direction dir) { switch (dir) { case DMA_BIDIRECTIONAL: case DMA_FROM_DEVICE: - do_cache_op(dma_handle, size, __invalidate_dcache_range); + do_cache_op(paddr, size, __invalidate_dcache_range); break; case DMA_NONE: @@ -68,15 +66,14 @@ static void xtensa_sync_single_for_cpu(struct device *dev, } } -static void xtensa_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) +void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr, + size_t size, enum dma_data_direction dir) { switch (dir) { case DMA_BIDIRECTIONAL: case DMA_TO_DEVICE: if (XCHAL_DCACHE_IS_WRITEBACK) - do_cache_op(dma_handle, size, __flush_dcache_range); + do_cache_op(paddr, size, __flush_dcache_range); break; case DMA_NONE: @@ -88,43 +85,66 @@ static void xtensa_sync_single_for_device(struct device *dev, } } -static void xtensa_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nents, - enum dma_data_direction dir) +#ifdef CONFIG_MMU +bool platform_vaddr_cached(const void *p) { - struct scatterlist *s; - int i; + unsigned long addr = (unsigned long)p; - for_each_sg(sg, s, nents, i) { - xtensa_sync_single_for_cpu(dev, sg_dma_address(s), - sg_dma_len(s), dir); - } + return addr >= XCHAL_KSEG_CACHED_VADDR && + addr - XCHAL_KSEG_CACHED_VADDR < XCHAL_KSEG_SIZE; } -static void xtensa_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nents, - enum dma_data_direction dir) +bool platform_vaddr_uncached(const void *p) { - struct scatterlist *s; - int i; + unsigned long addr = (unsigned long)p; - for_each_sg(sg, s, nents, i) { - xtensa_sync_single_for_device(dev, sg_dma_address(s), - sg_dma_len(s), dir); - } + return addr >= XCHAL_KSEG_BYPASS_VADDR && + addr - XCHAL_KSEG_BYPASS_VADDR < XCHAL_KSEG_SIZE; +} + +void *platform_vaddr_to_uncached(void *p) +{ + return p + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR; +} + +void *platform_vaddr_to_cached(void *p) +{ + return p + XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR; +} +#else +bool __attribute__((weak)) platform_vaddr_cached(const void *p) +{ + WARN_ONCE(1, "Default %s implementation is used\n", __func__); + return true; +} + +bool __attribute__((weak)) platform_vaddr_uncached(const void *p) +{ + WARN_ONCE(1, "Default %s implementation is used\n", __func__); + return false; +} + +void __attribute__((weak)) *platform_vaddr_to_uncached(void *p) +{ + WARN_ONCE(1, "Default %s implementation is used\n", __func__); + return p; +} + +void __attribute__((weak)) *platform_vaddr_to_cached(void *p) +{ + WARN_ONCE(1, "Default %s implementation is used\n", __func__); + return p; } +#endif /* * Note: We assume that the full memory space is always mapped to 'kseg' * Otherwise we have to use page attributes (not implemented). */ -static void *xtensa_dma_alloc(struct device *dev, size_t size, - dma_addr_t *handle, gfp_t flag, - unsigned long attrs) +void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, + gfp_t flag, unsigned long attrs) { - unsigned long ret; - unsigned long uncached; unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; struct page *page = NULL; @@ -147,6 +167,10 @@ static void *xtensa_dma_alloc(struct device *dev, size_t size, *handle = phys_to_dma(dev, page_to_phys(page)); + if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) { + return page; + } + #ifdef CONFIG_MMU if (PageHighMem(page)) { void *p; @@ -161,27 +185,21 @@ static void *xtensa_dma_alloc(struct device *dev, size_t size, return p; } #endif - ret = (unsigned long)page_address(page); - BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR || - ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1); - - uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR; - __invalidate_dcache_range(ret, size); - - return (void *)uncached; + BUG_ON(!platform_vaddr_cached(page_address(page))); + __invalidate_dcache_range((unsigned long)page_address(page), size); + return platform_vaddr_to_uncached(page_address(page)); } -static void xtensa_dma_free(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_handle, unsigned long attrs) +void arch_dma_free(struct device *dev, size_t size, void *vaddr, + dma_addr_t dma_handle, unsigned long attrs) { unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; - unsigned long addr = (unsigned long)vaddr; struct page *page; - if (addr >= XCHAL_KSEG_BYPASS_VADDR && - addr - XCHAL_KSEG_BYPASS_VADDR < XCHAL_KSEG_SIZE) { - addr += XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR; - page = virt_to_page(addr); + if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) { + page = vaddr; + } else if (platform_vaddr_uncached(vaddr)) { + page = virt_to_page(platform_vaddr_to_cached(vaddr)); } else { #ifdef CONFIG_MMU dma_common_free_remap(vaddr, size, VM_MAP); @@ -192,72 +210,3 @@ static void xtensa_dma_free(struct device *dev, size_t size, void *vaddr, if (!dma_release_from_contiguous(dev, page, count)) __free_pages(page, get_order(size)); } - -static dma_addr_t xtensa_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction dir, - unsigned long attrs) -{ - dma_addr_t dma_handle = page_to_phys(page) + offset; - - if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) - xtensa_sync_single_for_device(dev, dma_handle, size, dir); - - return dma_handle; -} - -static void xtensa_unmap_page(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction dir, - unsigned long attrs) -{ - if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) - xtensa_sync_single_for_cpu(dev, dma_handle, size, dir); -} - -static int xtensa_map_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction dir, - unsigned long attrs) -{ - struct scatterlist *s; - int i; - - for_each_sg(sg, s, nents, i) { - s->dma_address = xtensa_map_page(dev, sg_page(s), s->offset, - s->length, dir, attrs); - } - return nents; -} - -static void xtensa_unmap_sg(struct device *dev, - struct scatterlist *sg, int nents, - enum dma_data_direction dir, - unsigned long attrs) -{ - struct scatterlist *s; - int i; - - for_each_sg(sg, s, nents, i) { - xtensa_unmap_page(dev, sg_dma_address(s), - sg_dma_len(s), dir, attrs); - } -} - -int xtensa_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ - return 0; -} - -const struct dma_map_ops xtensa_dma_map_ops = { - .alloc = xtensa_dma_alloc, - .free = xtensa_dma_free, - .map_page = xtensa_map_page, - .unmap_page = xtensa_unmap_page, - .map_sg = xtensa_map_sg, - .unmap_sg = xtensa_unmap_sg, - .sync_single_for_cpu = xtensa_sync_single_for_cpu, - .sync_single_for_device = xtensa_sync_single_for_device, - .sync_sg_for_cpu = xtensa_sync_sg_for_cpu, - .sync_sg_for_device = xtensa_sync_sg_for_device, - .mapping_error = xtensa_dma_mapping_error, -}; -EXPORT_SYMBOL(xtensa_dma_map_ops); |