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| author | Max Filippov <jcmvbkbc@gmail.com> | 2019-05-12 20:28:25 -0700 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2019-07-08 10:04:48 -0700 |
| commit | d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a (patch) | |
| tree | 1780d36ac99c16f8ed506948a020017e84a89a9f /arch/xtensa/kernel/entry.S | |
| parent | 831c4f3da83e260df943dfb982d77cef5cba2c49 (diff) | |
| download | linux-d6d5f19e21d98c0607ff029e4e2e508d4cdd1d5a.tar.bz2 | |
xtensa: abstract 'entry' and 'retw' in assembly code
Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros
that allocate aligned stack frame in windowed and call0 ABIs.
Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack
frame size when register spilling is involved.
Replace all uses of 'entry' and 'retw' with the above macros.
This makes most of the xtensa assembly code ready for XEA3 and call0 ABI.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/entry.S')
| -rw-r--r-- | arch/xtensa/kernel/entry.S | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index e54af8b7e0f8..183fa8e0bb5b 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -1842,7 +1842,8 @@ ENDPROC(fast_store_prohibited) ENTRY(system_call) - entry a1, 32 + /* reserve 4 bytes on stack for function parameter */ + abi_entry(4) /* regs->syscall = regs->areg[2] */ @@ -1892,7 +1893,7 @@ ENTRY(system_call) s32i a6, a2, PT_AREG2 bnez a3, 1f - retw + abi_ret(4) 1: l32i a4, a1, 4 @@ -1901,7 +1902,7 @@ ENTRY(system_call) mov a6, a2 call4 do_syscall_trace_leave s32i a3, a2, PT_SYSCALL - retw + abi_ret(4) ENDPROC(system_call) @@ -1952,7 +1953,7 @@ ENDPROC(system_call) ENTRY(_switch_to) - entry a1, 48 + abi_entry(XTENSA_SPILL_STACK_RESERVE) mov a11, a3 # and 'next' (a3) @@ -2013,7 +2014,7 @@ ENTRY(_switch_to) wsr a14, ps rsync - retw + abi_ret(XTENSA_SPILL_STACK_RESERVE) ENDPROC(_switch_to) |