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| author | Al Viro <viro@zeniv.linux.org.uk> | 2012-11-16 22:27:58 -0500 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2012-11-16 22:27:58 -0500 |
| commit | d05f06e60df4f56a70fb8a3e46335b40687169e9 (patch) | |
| tree | c1eec6749fed86a21b08606e1e4acefe4b033253 /arch/xtensa/include/asm/timex.h | |
| parent | 0af1c5300db31f25a412e6e83d42b1747d56c9de (diff) | |
| parent | 1d72d9f83df057e71c7951def41138a0230bf737 (diff) | |
| download | linux-d05f06e60df4f56a70fb8a3e46335b40687169e9.tar.bz2 | |
Merge branch 'arch-frv' into no-rebases
Diffstat (limited to 'arch/xtensa/include/asm/timex.h')
| -rw-r--r-- | arch/xtensa/include/asm/timex.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/xtensa/include/asm/timex.h b/arch/xtensa/include/asm/timex.h index 053bc4272106..175b3d5e1b01 100644 --- a/arch/xtensa/include/asm/timex.h +++ b/arch/xtensa/include/asm/timex.h @@ -63,10 +63,10 @@ extern cycles_t cacheflush_time; * Register access. */ -#define WSR_CCOUNT(r) asm volatile ("wsr %0,"__stringify(CCOUNT) :: "a" (r)) -#define RSR_CCOUNT(r) asm volatile ("rsr %0,"__stringify(CCOUNT) : "=a" (r)) -#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(CCOMPARE)"+"__stringify(x) :: "a"(r)) -#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(CCOMPARE)"+"__stringify(x) : "=a"(r)) +#define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) +#define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) +#define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) +#define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) static inline unsigned long get_ccount (void) { |