summaryrefslogtreecommitdiffstats
path: root/arch/xtensa/include/asm/elf.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-19 13:05:22 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-19 13:05:22 -0800
commit2f0bf92513be58d2d65c0a4cc05c5779a7cd81e1 (patch)
tree969737816b237a6b920253e92cdac5dec99f04b5 /arch/xtensa/include/asm/elf.h
parent1bd12c91de35756129b8ffe28a4fe45177b86381 (diff)
parent055d4db1e1ef6f983c3565110fbe6737087e9103 (diff)
downloadlinux-2f0bf92513be58d2d65c0a4cc05c5779a7cd81e1.tar.bz2
Merge tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux
Pull Xtensa patchset from Chris Zankel: "This contains support of device trees, many fixes, and code clean-ups" * tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux: (33 commits) xtensa: don't try to build DTB when OF is disabled xtensa: set the correct ethernet address for xtfpga xtensa: clean up files to make them code-style compliant xtensa: provide endianness macro for sparse xtensa: fix RASID SR initialization xtensa: initialize CPENABLE SR when core has one xtensa: reset all timers on initialization Use for_each_compatible_node() macro. xtensa: add XTFPGA DTS xtensa: add support for the XTFPGA boards xtensa: add device trees support xtensa: add IRQ domains support xtensa: add U-Boot image support (uImage). xtensa: clean up boot make rules xtensa: fix mb and wmb definitions xtensa: add s32c1i-based spinlock implementations xtensa: add s32c1i-based bitops implementations xtensa: add s32c1i-based atomic ops implementations xtensa: add s32c1i sanity check xtensa: add trap_set_handler function ...
Diffstat (limited to 'arch/xtensa/include/asm/elf.h')
-rw-r--r--arch/xtensa/include/asm/elf.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/xtensa/include/asm/elf.h b/arch/xtensa/include/asm/elf.h
index 5293312bc6a4..264d5fa450d8 100644
--- a/arch/xtensa/include/asm/elf.h
+++ b/arch/xtensa/include/asm/elf.h
@@ -168,11 +168,11 @@ extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
*/
#define ELF_PLAT_INIT(_r, load_addr) \
- do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
- _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
- _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
- _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
- } while (0)
+ do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
+ _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
+ _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
+ _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
+ } while (0)
typedef struct {
xtregs_opt_t opt;