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| author | Yazen Ghannam <yazen.ghannam@amd.com> | 2018-03-26 14:15:25 -0500 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-03-28 20:34:59 +0200 |
| commit | e2efacb6a54ab54626da3507be1008d0040492cc (patch) | |
| tree | 69769c24726c81c92be0a60da8dbf28d5e169b31 /arch/x86 | |
| parent | 24193c5de470358d0ed70e1f8e58fdaf83823b95 (diff) | |
| download | linux-e2efacb6a54ab54626da3507be1008d0040492cc.tar.bz2 | |
Revert "x86/mce/AMD: Collect error info even if valid bits are not set"
This reverts commit 4b1e84276a6172980c5bf39aa091ba13e90d6dad.
Software uses the valid bits to decide if the values can be used for
further processing or other actions. So setting the valid bits will have
software act on values that it shouldn't be acting on.
The recommendation to save all the register values does not mean that
the values are always valid.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: tony.luck@intel.com
Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: bp@suse.de
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/20180326191526.64314-1-Yazen.Ghannam@amd.com
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 21962c48dad7..3c1eec17312b 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -446,20 +446,6 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs) if (mca_cfg.rip_msr) m->ip = mce_rdmsrl(mca_cfg.rip_msr); } - - /* - * Error handlers should save the values in MCA_ADDR, MCA_MISC0, and - * MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and - * MCA_STATUS[SyndV] are zero. - */ - if (m->cpuvendor == X86_VENDOR_AMD) { - u64 status = MCI_STATUS_ADDRV | MCI_STATUS_MISCV; - - if (mce_flags.smca) - status |= MCI_STATUS_SYNDV; - - m->status |= status; - } } int mce_available(struct cpuinfo_x86 *c) |