diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2019-06-01 10:08:37 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-06-05 17:37:15 +0200 |
| commit | 75a6faf617d107bdbc74d36ccf89f2280b96ac26 (patch) | |
| tree | caeef3a68ae2b948d40576ee876b28293b2aa193 /arch/x86 | |
| parent | 579d8b5c8d61462fe44831ce79ee76f1d566b0c4 (diff) | |
| download | linux-75a6faf617d107bdbc74d36ccf89f2280b96ac26.tar.bz2 | |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 101 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/platform/intel-mid/pwr.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/x86/platform/intel-mid/pwr.c b/arch/x86/platform/intel-mid/pwr.c index 49ec5b94c71f..27288d8d3f71 100644 --- a/arch/x86/platform/intel-mid/pwr.c +++ b/arch/x86/platform/intel-mid/pwr.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Intel MID Power Management Unit (PWRMU) device driver * @@ -5,10 +6,6 @@ * * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * * Intel MID Power Management Unit device driver handles the South Complex PCI * devices such as GPDMA, SPI, I2C, PWM, and so on. By default PCI core * modifies bits in PMCSR register in the PCI configuration space. This is not |