diff options
| author | Robert Richter <robert.richter@amd.com> | 2012-06-15 19:06:44 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-06-18 11:14:35 +0200 |
| commit | 76958a61e42fb6277a8431eb17e4bdb24176f1b7 (patch) | |
| tree | bac2ee9edf3ebc32d2f1594cb873aa2f67431d3d /arch/x86 | |
| parent | 4983955c049d1debe5f6bee3aeb54ff5942fcd39 (diff) | |
| download | linux-76958a61e42fb6277a8431eb17e4bdb24176f1b7.tar.bz2 | |
perf/x86/amd: Fix RDPMC index calculation for AMD family 15h
The RDPMC index calculation is wrong for AMD family 15h
(X86_FEATURE_ PERFCTR_CORE set). This leads to a #GP when
accessing the counter:
Pid: 2237, comm: syslog-ng Not tainted 3.5.0-rc1-perf-x86_64-standard-g130ff90 #135 AMD Pike/Pike
RIP: 0010:[<ffffffff8100dc33>] [<ffffffff8100dc33>] x86_perf_event_update+0x27/0x66
While the msr address offset is (index << 1) we must use index to
select the correct rdpmc.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Vince Weaver <vweaver1@eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c index 766c76d5ec4c..d1f38c9509d0 100644 --- a/arch/x86/kernel/cpu/perf_event.c +++ b/arch/x86/kernel/cpu/perf_event.c @@ -823,7 +823,7 @@ static inline void x86_assign_hw_event(struct perf_event *event, } else { hwc->config_base = x86_pmu_config_addr(hwc->idx); hwc->event_base = x86_pmu_event_addr(hwc->idx); - hwc->event_base_rdpmc = x86_pmu_addr_offset(hwc->idx); + hwc->event_base_rdpmc = hwc->idx; } } |