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author | Thomas Gleixner <tglx@linutronix.de> | 2018-05-29 17:50:22 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-06-21 14:20:57 +0200 |
commit | 6a4d2657e048f096c7ffcad254010bd94891c8c0 (patch) | |
tree | 20d72fc0fdc2d6a5903ed7f0681dbc50e5c93d66 /arch/x86/kernel/smpboot.c | |
parent | ba2591a5993eabcc8e874e30f361d8ffbb10d6d4 (diff) | |
download | linux-6a4d2657e048f096c7ffcad254010bd94891c8c0.tar.bz2 |
x86/smp: Provide topology_is_primary_thread()
If the CPU is supporting SMT then the primary thread can be found by
checking the lower APIC ID bits for zero. smp_num_siblings is used to build
the mask for the APIC ID bits which need to be taken into account.
This uses the MPTABLE or ACPI/MADT supplied APIC ID, which can be different
than the initial APIC ID in CPUID. But according to AMD the lower bits have
to be consistent. Intel gave a tentative confirmation as well.
Preparatory patch to support disabling SMT at boot/runtime.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/smpboot.c')
-rw-r--r-- | arch/x86/kernel/smpboot.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index c2f7d1d2a5c3..f9c731240142 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -266,6 +266,15 @@ static void notrace start_secondary(void *unused) } /** + * topology_is_primary_thread - Check whether CPU is the primary SMT thread + * @cpu: CPU to check + */ +bool topology_is_primary_thread(unsigned int cpu) +{ + return apic_id_is_primary_thread(per_cpu(x86_cpu_to_apicid, cpu)); +} + +/** * topology_phys_to_logical_pkg - Map a physical package id to a logical * * Returns logical package id or -1 if not found |