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author | Ingo Molnar <mingo@elte.hu> | 2008-12-25 13:51:46 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-12-25 13:51:46 +0100 |
commit | 0b271ef4521756010675b1611bef20fd3096790d (patch) | |
tree | 2c9d22a2c74122a9904e533df27f41d63ffef394 /arch/x86/kernel/microcode_intel.c | |
parent | b19b3c74c7bbec45a848631b8f970ac110665a01 (diff) | |
parent | 4a6908a3a050aacc9c3a2f36b276b46c0629ad91 (diff) | |
download | linux-0b271ef4521756010675b1611bef20fd3096790d.tar.bz2 |
Merge commit 'v2.6.28' into core/core
Diffstat (limited to 'arch/x86/kernel/microcode_intel.c')
-rw-r--r-- | arch/x86/kernel/microcode_intel.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c index 622dc4a21784..a8e62792d171 100644 --- a/arch/x86/kernel/microcode_intel.c +++ b/arch/x86/kernel/microcode_intel.c @@ -155,6 +155,7 @@ static DEFINE_SPINLOCK(microcode_update_lock); static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) { struct cpuinfo_x86 *c = &cpu_data(cpu_num); + unsigned long flags; unsigned int val[2]; memset(csig, 0, sizeof(*csig)); @@ -174,11 +175,16 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) csig->pf = 1 << ((val[1] >> 18) & 7); } + /* serialize access to the physical write to MSR 0x79 */ + spin_lock_irqsave(µcode_update_lock, flags); + wrmsr(MSR_IA32_UCODE_REV, 0, 0); /* see notes above for revision 1.07. Apparent chip bug */ sync_core(); /* get the current revision from MSR 0x8B */ rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev); + spin_unlock_irqrestore(µcode_update_lock, flags); + pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", csig->sig, csig->pf, csig->rev); |