diff options
| author | Andi Kleen <ak@linux.intel.com> | 2015-06-30 16:33:24 -0700 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-08-04 10:16:59 +0200 |
| commit | 8c4fe7095d633dd5543690ea5c3d522c5cd989b6 (patch) | |
| tree | 4bcf7d80e52e1607366d7cfeb73fa03ca888d391 /arch/x86/kernel/cpu/perf_event_intel.c | |
| parent | 47732d886385af769449022a02c7cf0ce45d8a5c (diff) | |
| download | linux-8c4fe7095d633dd5543690ea5c3d522c5cd989b6.tar.bz2 | |
perf/x86/intel: Use 0x11 as extra reg test value
The next patch adds a new perf extra register where 0x1ff is not a valid
value. Use 0x11 instead.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1435707205-6676-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event_intel.c')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 28fc27202d28..a478e3c4cc3f 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -3579,7 +3579,7 @@ __init int intel_pmu_init(void) */ if (x86_pmu.extra_regs) { for (er = x86_pmu.extra_regs; er->msr; er++) { - er->extra_msr_access = check_msr(er->msr, 0x1ffUL); + er->extra_msr_access = check_msr(er->msr, 0x11UL); /* Disable LBR select mapping */ if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access) x86_pmu.lbr_sel_map = NULL; |