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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-15 09:32:59 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-11-15 09:32:59 -0800 |
commit | bba072dfd7bf87f0712e569a78ae9c0e91e0a8df (patch) | |
tree | 12b89e5c5b24183c21988129ef3a837edd925b4b /arch/x86/kernel/cpu/cpu.h | |
parent | 511601bdbcacd3ab615564941409bf012435b23d (diff) | |
parent | 04633df0c43d710e5f696b06539c100898678235 (diff) | |
download | linux-bba072dfd7bf87f0712e569a78ae9c0e91e0a8df.tar.bz2 |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A couple of fixes and updates related to x86:
- Fix the W+X check regression on XEN
- The real fix for the low identity map trainwreck
- Probe legacy PIC early instead of unconditionally allocating legacy
irqs
- Add cpu verification to long mode entry
- Adjust the cache topology to AMD Fam17H systems
- Let Merrifield use the TSC across S3"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu: Call verify_cpu() after having entered long mode too
x86/setup: Fix low identity map for >= 2GB kernel range
x86/mm: Skip the hypervisor range when walking PGD
x86/AMD: Fix last level cache topology for AMD Fam17h systems
x86/irq: Probe for PIC presence before allocating descs for legacy IRQs
x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield
Diffstat (limited to 'arch/x86/kernel/cpu/cpu.h')
0 files changed, 0 insertions, 0 deletions