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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-04-27 08:44:34 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-04-27 08:44:34 +0100 |
commit | 167f829752f9cef51f59cc500abc0ad6ba69f5cb (patch) | |
tree | d3ec172cdd864c748bea2c014943fc13873fefc0 /arch/x86/kernel/cpu/amd.c | |
parent | e04d6c53a58cee3380adaa66fe2eeffbd82d213c (diff) | |
parent | 45b146d746ea1b7f87b023a79d5186d0e87793eb (diff) | |
download | linux-167f829752f9cef51f59cc500abc0ad6ba69f5cb.tar.bz2 |
Merge branch 'davinci-fixes' of git://gitorious.org/linux-davinci/linux-davinci into fixes
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 3ecece0217ef..3532d3bf8105 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -615,6 +615,25 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) /* As a rule processors have APIC timer running in deep C states */ if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400)) set_cpu_cap(c, X86_FEATURE_ARAT); + + /* + * Disable GART TLB Walk Errors on Fam10h. We do this here + * because this is always needed when GART is enabled, even in a + * kernel which has no MCE support built in. + */ + if (c->x86 == 0x10) { + /* + * BIOS should disable GartTlbWlk Errors themself. If + * it doesn't do it here as suggested by the BKDG. + * + * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012 + */ + u64 mask; + + rdmsrl(MSR_AMD64_MCx_MASK(4), mask); + mask |= (1 << 10); + wrmsrl(MSR_AMD64_MCx_MASK(4), mask); + } } #ifdef CONFIG_X86_32 |