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| author | Simon Guo <wei.guo.simon@gmail.com> | 2018-06-08 01:40:03 -0400 |
|---|---|---|
| committer | Paul Mackerras <paulus@ozlabs.org> | 2018-06-13 09:46:13 +1000 |
| commit | f61e0d3cc4aee194014074471658a5a037e311ce (patch) | |
| tree | 8190e115a148df9b22b0795460d368fb2c70e6c6 /arch/x86/events/intel/pt.c | |
| parent | db96a04a86c73817b4584aa4fa2a3f60a9aa3c52 (diff) | |
| download | linux-f61e0d3cc4aee194014074471658a5a037e311ce.tar.bz2 | |
KVM: PPC: Book3S PR: Fix failure status setting in tabort. emulation
tabort. will perform transaction failure recording and the recording
depends on TEXASR FS bit. Currently the TEXASR FS bit is retrieved
after tabort., when the TEXASR FS bit is already been updated by
tabort. itself.
This patch corrects this behavior by retrieving TEXASR val before
tabort.
tabort. will not immediately leads to transaction failure handling
in suspend state. So this patch also remove the mtspr on TEXASR/TFIAR
registers to avoid TM bad thing exception.
Fixes: 26798f88d58d ("KVM: PPC: Book3S PR: Add emulation for tabort. in privileged state")
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Diffstat (limited to 'arch/x86/events/intel/pt.c')
0 files changed, 0 insertions, 0 deletions