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| author | Christoph Hellwig <hch@lst.de> | 2017-08-27 10:37:15 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2017-10-19 16:37:49 +0200 |
| commit | c9eb6172c328dde7e14812f94f8da87b691e41b5 (patch) | |
| tree | 5b27a749da30670bd6141f3f3b0ddb67d48e4520 /arch/tile | |
| parent | e0c6584df9c414b50de17e1abc1099f7501bbb60 (diff) | |
| download | linux-c9eb6172c328dde7e14812f94f8da87b691e41b5.tar.bz2 | |
dma-mapping: turn dma_cache_sync into a dma_map_ops method
After we removed all the dead wood it turns out only two architectures
actually implement dma_cache_sync as a real op: mips and parisc. Add
a cache_sync method to struct dma_map_ops and implement it for the
mips defualt DMA ops, and the parisc pa11 ops.
Note that arm, arc and openrisc support DMA_ATTR_NON_CONSISTENT, but
never provided a functional dma_cache_sync implementations, which
seems somewhat odd.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Diffstat (limited to 'arch/tile')
| -rw-r--r-- | arch/tile/include/asm/dma-mapping.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h index 7061dc8af43a..97ad62878290 100644 --- a/arch/tile/include/asm/dma-mapping.h +++ b/arch/tile/include/asm/dma-mapping.h @@ -67,13 +67,4 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) #define HAVE_ARCH_DMA_SET_MASK 1 int dma_set_mask(struct device *dev, u64 mask); -/* - * dma_alloc_attrs() always returns non-cacheable memory, so there's no need to - * do any flushing here. - */ -static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) -{ -} - #endif /* _ASM_TILE_DMA_MAPPING_H */ |