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author | Beata Michalska <beata.michalska@arm.com> | 2021-06-03 15:06:25 +0100 |
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committer | Peter Zijlstra <peterz@infradead.org> | 2021-06-24 09:07:50 +0200 |
commit | 2309a05d2abe713f7debc951640b010370c8befb (patch) | |
tree | af56a0f9c36d04611229e1d23b09bd7e28570fb8 /arch/sparc | |
parent | 8f91efd870ea5d8bc10b0fcc9740db51cd4c0c83 (diff) | |
download | linux-2309a05d2abe713f7debc951640b010370c8befb.tar.bz2 |
sched/core: Introduce SD_ASYM_CPUCAPACITY_FULL sched_domain flag
Introducing new, complementary to SD_ASYM_CPUCAPACITY, sched_domain
topology flag, to distinguish between shed_domains where any CPU
capacity asymmetry is detected (SD_ASYM_CPUCAPACITY) and ones where
a full set of CPU capacities is visible to all domain members
(SD_ASYM_CPUCAPACITY_FULL).
With the distinction between full and partial CPU capacity asymmetry,
brought in by the newly introduced flag, the scope of the original
SD_ASYM_CPUCAPACITY flag gets shifted, still maintaining the existing
behaviour when one is detected on a given sched domain, allowing
misfit migrations within sched domains that do not observe full range
of CPU capacities but still do have members with different capacity
values. It loses though it's meaning when it comes to the lowest CPU
asymmetry sched_domain level per-cpu pointer, which is to be now
denoted by SD_ASYM_CPUCAPACITY_FULL flag.
Signed-off-by: Beata Michalska <beata.michalska@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com>
Link: https://lore.kernel.org/r/20210603140627.8409-2-beata.michalska@arm.com
Diffstat (limited to 'arch/sparc')
0 files changed, 0 insertions, 0 deletions