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author | Dave Jones <davej@redhat.com> | 2006-04-18 17:19:55 -0500 |
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committer | Dave Jones <davej@redhat.com> | 2006-04-18 17:19:55 -0500 |
commit | f1f76afd71e0f17af9a35fcb649f4bab53304a4d (patch) | |
tree | a56257b13a0eda4a9b7e950c3b85adad16341b80 /arch/sparc64/mm/fault.c | |
parent | 530515a06f90c0831732709efee4a99497bd2b7c (diff) | |
parent | 385910f2b275a636238f70844f1b6da9fda6f2da (diff) | |
download | linux-f1f76afd71e0f17af9a35fcb649f4bab53304a4d.tar.bz2 |
Merge ../linus
Diffstat (limited to 'arch/sparc64/mm/fault.c')
-rw-r--r-- | arch/sparc64/mm/fault.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/sparc64/mm/fault.c b/arch/sparc64/mm/fault.c index 0db2f7d9fab5..6e002aacb961 100644 --- a/arch/sparc64/mm/fault.c +++ b/arch/sparc64/mm/fault.c @@ -327,8 +327,12 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs) insn = get_fault_insn(regs, 0); if (!insn) goto continue_fault; + /* All loads, stores and atomics have bits 30 and 31 both set + * in the instruction. Bit 21 is set in all stores, but we + * have to avoid prefetches which also have bit 21 set. + */ if ((insn & 0xc0200000) == 0xc0200000 && - (insn & 0x1780000) != 0x1680000) { + (insn & 0x01780000) != 0x01680000) { /* Don't bother updating thread struct value, * because update_mmu_cache only cares which tlb * the access came from. |