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authorDavid Ahern <david.ahern@oracle.com>2015-03-19 16:06:37 -0400
committerDavid S. Miller <davem@davemloft.net>2015-03-19 18:54:49 -0700
commitb5aff55d89c27aedcae9521155b81b6aebb6c5d8 (patch)
treebc59ebea2c767a7d1411441374aa22073f700be5 /arch/sparc/kernel/hvcalls.S
parentd51291cb8f32bfae6b331e1838651f3ddefa73a5 (diff)
downloadlinux-b5aff55d89c27aedcae9521155b81b6aebb6c5d8.tar.bz2
sparc: perf: Add support M7 processor
The M7 processor has a different hypervisor group id and different PCR fast trap values. PIC read/write functions and PCR bit fields are the same as the T4 so those are reused. Signed-off-by: David Ahern <david.ahern@oracle.com> Acked-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel/hvcalls.S')
-rw-r--r--arch/sparc/kernel/hvcalls.S16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/sparc/kernel/hvcalls.S b/arch/sparc/kernel/hvcalls.S
index caedf8320416..afbaba52d2f1 100644
--- a/arch/sparc/kernel/hvcalls.S
+++ b/arch/sparc/kernel/hvcalls.S
@@ -837,3 +837,19 @@ ENTRY(sun4v_t5_set_perfreg)
retl
nop
ENDPROC(sun4v_t5_set_perfreg)
+
+ENTRY(sun4v_m7_get_perfreg)
+ mov %o1, %o4
+ mov HV_FAST_M7_GET_PERFREG, %o5
+ ta HV_FAST_TRAP
+ stx %o1, [%o4]
+ retl
+ nop
+ENDPROC(sun4v_m7_get_perfreg)
+
+ENTRY(sun4v_m7_set_perfreg)
+ mov HV_FAST_M7_SET_PERFREG, %o5
+ ta HV_FAST_TRAP
+ retl
+ nop
+ENDPROC(sun4v_m7_set_perfreg)