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| author | David S. Miller <davem@davemloft.net> | 2016-10-06 01:44:56 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-10-06 01:44:56 -0400 |
| commit | 27f145e74c274fa6e40056f3a8d5dc3563bd7369 (patch) | |
| tree | 8211bfaa3f0a1079db760f96f9d7ff277f996f62 /arch/sparc/include/asm/hypervisor.h | |
| parent | cdd4f4c71047cdd28c13891e6e217765ea1c1bdc (diff) | |
| parent | aa7bde1a8b49391d34f17905a04c3acf7770283d (diff) | |
| download | linux-27f145e74c274fa6e40056f3a8d5dc3563bd7369.tar.bz2 | |
Merge branch 'sparc-pcie-perf'
Chris Hyser says:
====================
sparc64: PCIe performance enhancements
Ver 2 is redone for 4.8 where commit 00085f1efa387a8ce100e3734920f7639c80caa3
changed DMA attributes from struct pointer to unsigned long.
This set of patches initiates a series of PCIe performance enhancement patch
submittals.
Patch 1/2 enables version 2 of the SPARC sun4v IOMMU I/O address translation
services need for subsequent enhancements.
Patch 2/2 allows drivers to specify DMA_ATTR_WEAK_ORDERING via DMA attributes
to the SPARC DMA mapping routines enabling "relaxed ordering" for the buffer
being mapped.
[Still relevant write-up]
PCI-Express Relaxed Ordering and the Sun SPARC Enterprise M-class Servers
https://blogs.oracle.com/olympus/entry/relaxed_ordering
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/hypervisor.h')
| -rw-r--r-- | arch/sparc/include/asm/hypervisor.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h index f5b6537306f0..666d5ba230d2 100644 --- a/arch/sparc/include/asm/hypervisor.h +++ b/arch/sparc/include/asm/hypervisor.h @@ -1744,6 +1744,7 @@ unsigned long sun4v_vintr_set_target(unsigned long dev_handle, #define HV_PCI_MAP_ATTR_READ 0x01 #define HV_PCI_MAP_ATTR_WRITE 0x02 +#define HV_PCI_MAP_ATTR_RELAXED_ORDER 0x04 #define HV_PCI_DEVICE_BUILD(b,d,f) \ ((((b) & 0xff) << 16) | \ |