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authorPaul Mundt <lethal@linux-sh.org>2009-07-22 19:20:49 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-07-22 19:20:49 +0900
commit2277ab4a1df50e05bc732fe9488d4e902bb8399a (patch)
treef41cb47f15e02bbd1f79bf08ef7762d3bba934f6 /arch/sh/mm/tlb-sh4.c
parentc0b96cf639aa1bfa8983f734d4225091aa813e00 (diff)
downloadlinux-2277ab4a1df50e05bc732fe9488d4e902bb8399a.tar.bz2
sh: Migrate from PG_mapped to PG_dcache_dirty.
This inverts the delayed dcache flush a bit to be more in line with other platforms. At the same time this also gives us the ability to do some more optimizations and cleanup. Now that the update_mmu_cache() callsite only tests for the bit, the implementation can gradually be split out and made generic, rather than relying on special implementations for each of the peculiar CPU types. SH7705 in 32kB mode and SH-4 still need slightly different handling, but this is something that can remain isolated in the varying page copy/clear routines. On top of that, SH-X3 is dcache coherent, so there is no need to bother with any of these tests in the PTEAEX version of update_mmu_cache(), so we kill that off too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/tlb-sh4.c')
-rw-r--r--arch/sh/mm/tlb-sh4.c23
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index f0c7b7397fa6..cf50082d2435 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -21,27 +21,26 @@ void update_mmu_cache(struct vm_area_struct * vma,
unsigned long flags;
unsigned long pteval;
unsigned long vpn;
+ unsigned long pfn = pte_pfn(pte);
+ struct page *page;
/* Ptrace may call this routine. */
if (vma && current->active_mm != vma->vm_mm)
return;
-#ifndef CONFIG_CACHE_OFF
- {
- unsigned long pfn = pte_pfn(pte);
+ page = pfn_to_page(pfn);
+ if (pfn_valid(pfn) && page_mapping(page)) {
+#ifndef CONFIG_SMP
+ int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
+ if (dirty) {
- if (pfn_valid(pfn)) {
- struct page *page = pfn_to_page(pfn);
+ unsigned long addr = (unsigned long)page_address(page);
- if (!test_bit(PG_mapped, &page->flags)) {
- unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
- __flush_wback_region((void *)P1SEGADDR(phys),
- PAGE_SIZE);
- __set_bit(PG_mapped, &page->flags);
- }
+ if (pages_do_alias(addr, address & PAGE_MASK))
+ __flush_wback_region((void *)addr, PAGE_SIZE);
}
- }
#endif
+ }
local_irq_save(flags);