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authorMatt Fleming <matt@console-pimps.org>2009-10-06 21:22:32 +0000
committerPaul Mundt <lethal@linux-sh.org>2009-10-10 21:52:26 +0900
commitef269b32763b22100eda9c0bf99d462c6cd65377 (patch)
tree3df3d5f1b5d3cb7610671920ff21bfeef000fb9e /arch/sh/mm/pmb.c
parent3105121949b609964f370d42d1b90fe7fc01d6b1 (diff)
downloadlinux-ef269b32763b22100eda9c0bf99d462c6cd65377.tar.bz2
sh: Fix the offset from P1SEG/P2SEG where we map RAM
We need to map the gap between 0x00000000 and __MEMORY_START in the PMB, as well as RAM. With this change my 7785LCR board can switch to 32bit MMU mode at runtime. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/pmb.c')
-rw-r--r--arch/sh/mm/pmb.c13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 2d009bdcf901..7e64f6d960c5 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -275,7 +275,7 @@ static void __pmb_unmap(struct pmb_entry *pmbe)
int __uses_jump_to_uncached pmb_init(void)
{
unsigned int i;
- long size;
+ long size, ret;
jump_to_uncached();
@@ -287,12 +287,13 @@ int __uses_jump_to_uncached pmb_init(void)
* P1 - provides a cached window onto physical memory
* P2 - provides an uncached window onto physical memory
*/
- size = pmb_remap(P2SEG, __MEMORY_START, __MEMORY_SIZE,
- PMB_WT | PMB_UB);
- BUG_ON(size != __MEMORY_SIZE);
+ size = __MEMORY_START + __MEMORY_SIZE;
- size = pmb_remap(P1SEG, __MEMORY_START, __MEMORY_SIZE, PMB_C);
- BUG_ON(size != __MEMORY_SIZE);
+ ret = pmb_remap(P1SEG, 0x00000000, size, PMB_C);
+ BUG_ON(ret != size);
+
+ ret = pmb_remap(P2SEG, 0x00000000, size, PMB_WT | PMB_UB);
+ BUG_ON(ret != size);
ctrl_outl(0, PMB_IRMCR);