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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 15:59:17 +0900
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 15:59:17 +0900
commit5283ecb5ccbdb90d49fce6488d3944bba63a591c (patch)
treea58e20bd532fa5f933d099bb7b5dd0637b581d33 /arch/sh/boards/renesas
parentd7c30c682a278abe1a52db83f69efec1a9d8f8c2 (diff)
downloadlinux-5283ecb5ccbdb90d49fce6488d3944bba63a591c.tar.bz2
sh: Add support for R7780RP and R7780MP boards.
This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boards/renesas')
-rw-r--r--arch/sh/boards/renesas/r7780rp/Kconfig14
-rw-r--r--arch/sh/boards/renesas/r7780rp/Makefile6
-rw-r--r--arch/sh/boards/renesas/r7780rp/io.c338
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq.c123
-rw-r--r--arch/sh/boards/renesas/r7780rp/led.c45
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c164
6 files changed, 690 insertions, 0 deletions
diff --git a/arch/sh/boards/renesas/r7780rp/Kconfig b/arch/sh/boards/renesas/r7780rp/Kconfig
new file mode 100644
index 000000000000..c26d9813d239
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Kconfig
@@ -0,0 +1,14 @@
+if SH_R7780RP
+
+menu "R7780RP options"
+
+config SH_R7780MP
+ bool "R7780MP board support"
+ default y
+ help
+ Selecting this option will enable support for the mass-production
+ version of the R7780RP. If in doubt, say Y.
+
+endmenu
+
+endif
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
new file mode 100644
index 000000000000..f1776d027978
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the R7780RP-1 specific parts of the kernel
+#
+
+obj-y := setup.o io.o irq.o
+obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
new file mode 100644
index 000000000000..f73ca3f0f5a1
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -0,0 +1,338 @@
+/*
+ * linux/arch/sh/kernel/io_r7780rp.c
+ *
+ * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
+ * Based largely on io_se.c.
+ *
+ * I/O routine for Renesas Solutions Highlander R7780RP-1
+ *
+ * Initial version only to support LAN access; some
+ * placeholder code from io_r7780rp.c left in with the
+ * expectation of later SuperIO and PCMCIA access.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/r7780rp/r7780rp.h>
+#include <asm/addrspace.h>
+#include <asm/io.h>
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include "../../../drivers/pci/pci-sh7780.h"
+
+/*
+ * The 7780 R7780RP-1 uses the built-in PCI controller (PCIC)
+ * of the 7780 processor, and has a SuperIO accessible via the PCI.
+ * The board also includes a PCMCIA controller on its memory bus,
+ * like the other Solution Engine boards.
+ */
+
+#define SH7780_PCIIOBR_MASK 0xFFFC0000 /* IO Space Mask */
+#define PCIIOBR (volatile long *)PCI_REG(SH7780_PCIIOBR)
+#define PCIMBR (volatile long *)PCI_REG(SH7780_PCIMBR)
+#define PCI_IO_AREA SH7780_PCI_IO_BASE
+#define PCI_MEM_AREA SH7780_PCI_CONFIG_BASE
+
+#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7780_PCIIOBR_MASK))
+
+static inline void delay(void)
+{
+ ctrl_inw(0xa0000000);
+}
+
+static inline unsigned long port2adr(unsigned int port)
+{
+ if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+ if (port == 0x3f6)
+ return (PA_AREA5_IO + 0x80c);
+ else
+ return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
+ else
+ maybebadio((unsigned long)port);
+
+ return port;
+}
+
+static inline unsigned long port88796l(unsigned int port, int flag)
+{
+ unsigned long addr;
+
+ if (flag)
+ addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
+ else
+ addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
+
+ return addr;
+}
+
+/* The 7780 R7780RP-1 seems to have everything hooked */
+/* up pretty normally (nothing on high-bytes only...) so this */
+/* shouldn't be needed */
+static inline int shifted_port(unsigned long port)
+{
+ /* For IDE registers, value is not shifted */
+ if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+ return 0;
+ else
+ return 1;
+}
+
+/* In case someone configures the kernel w/o PCI support: in that */
+/* scenario, don't ever bother to check for PCI-window addresses */
+
+/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
+#if defined(CONFIG_PCI)
+#define CHECK_SH7780_PCIIO(port) \
+ ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7780_PCI_IO_SIZE)))
+#else
+#define CHECK_SH7780_PCIIO(port) (0)
+#endif
+
+#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
+#define CHECK_AX88796L_PORT(port) \
+ ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
+#else
+#define CHECK_AX88796L_PORT(port) (0)
+#endif
+
+/*
+ * General outline: remap really low stuff [eventually] to SuperIO,
+ * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
+ * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
+ * should be way beyond the window, and is used w/o translation for
+ * compatibility.
+ */
+u8 r7780rp_inb(unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ return ctrl_inw(port88796l(port, 0)) & 0xff;
+ else if (PXSEG(port))
+ return ctrl_inb(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ return ctrl_inb(PCI_IOMAP(port));
+
+ return ctrl_inw(port2adr(port)) & 0xff;
+}
+
+u8 r7780rp_inb_p(unsigned long port)
+{
+ u8 v;
+
+ if (CHECK_AX88796L_PORT(port))
+ v = ctrl_inw(port88796l(port, 0)) & 0xff;
+ else if (PXSEG(port))
+ v = ctrl_inb(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ v = ctrl_inb(PCI_IOMAP(port));
+ else
+ v = ctrl_inw(port2adr(port)) & 0xff;
+
+ delay();
+
+ return v;
+}
+
+u16 r7780rp_inw(unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (PXSEG(port))
+ return ctrl_inw(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ return ctrl_inw(PCI_IOMAP(port));
+ else
+ maybebadio(port);
+
+ return 0;
+}
+
+u32 r7780rp_inl(unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (PXSEG(port))
+ return ctrl_inl(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ return ctrl_inl(PCI_IOMAP(port));
+ else
+ maybebadio(port);
+
+ return 0;
+}
+
+void r7780rp_outb(u8 value, unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ ctrl_outw(value, port88796l(port, 0));
+ else if (PXSEG(port))
+ ctrl_outb(value, port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ ctrl_outb(value, PCI_IOMAP(port));
+ else
+ ctrl_outw(value, port2adr(port));
+}
+
+void r7780rp_outb_p(u8 value, unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ ctrl_outw(value, port88796l(port, 0));
+ else if (PXSEG(port))
+ ctrl_outb(value, port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ ctrl_outb(value, PCI_IOMAP(port));
+ else
+ ctrl_outw(value, port2adr(port));
+
+ delay();
+}
+
+void r7780rp_outw(u16 value, unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (PXSEG(port))
+ ctrl_outw(value, port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ ctrl_outw(value, PCI_IOMAP(port));
+ else
+ maybebadio(port);
+}
+
+void r7780rp_outl(u32 value, unsigned long port)
+{
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (PXSEG(port))
+ ctrl_outl(value, port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ ctrl_outl(value, PCI_IOMAP(port));
+ else
+ maybebadio(port);
+}
+
+void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
+{
+ volatile u16 *p;
+ u8 *buf = dst;
+
+ if (CHECK_AX88796L_PORT(port)) {
+ p = (volatile u16 *)port88796l(port, 0);
+ while (count--)
+ *buf++ = *p & 0xff;
+ } else if (PXSEG(port)) {
+ while (count--)
+ *buf++ = *(volatile u8 *)port;
+ } else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
+ volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
+
+ while (count--)
+ *buf++ = *bp;
+ } else {
+ p = (volatile u16 *)port2adr(port);
+ while (count--)
+ *buf++ = *p & 0xff;
+ }
+}
+
+void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
+{
+ volatile u16 *p;
+ u16 *buf = dst;
+
+ if (CHECK_AX88796L_PORT(port))
+ p = (volatile u16 *)port88796l(port, 1);
+ else if (PXSEG(port))
+ p = (volatile u16 *)port;
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ p = (volatile u16 *)PCI_IOMAP(port);
+ else
+ p = (volatile u16 *)port2adr(port);
+
+ while (count--)
+ *buf++ = *p;
+}
+
+void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
+{
+ u32 *buf = dst;
+
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
+ volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
+
+ while (count--)
+ *buf++ = *p;
+ } else
+ maybebadio(port);
+}
+
+void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
+{
+ volatile u16 *p;
+ const u8 *buf = src;
+
+ if (CHECK_AX88796L_PORT(port)) {
+ p = (volatile u16 *)port88796l(port, 0);
+ while (count--)
+ *p = *buf++;
+ } else if (PXSEG(port))
+ while (count--)
+ ctrl_outb(*buf++, port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
+ volatile u8 *bp = (volatile u8 *)PCI_IOMAP(port);
+
+ while (count--)
+ *bp = *buf++;
+ } else {
+ p = (volatile u16 *)port2adr(port);
+ while (count--)
+ *p = *buf++;
+ }
+}
+
+void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
+{
+ volatile u16 *p;
+ const u16 *buf = src;
+
+ if (CHECK_AX88796L_PORT(port))
+ p = (volatile u16 *)port88796l(port, 1);
+ else if (PXSEG(port))
+ p = (volatile u16 *)port;
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ p = (volatile u16 *)PCI_IOMAP(port);
+ else
+ p = (volatile u16 *)port2adr(port);
+
+ while (count--)
+ *p = *buf++;
+}
+
+void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
+{
+ const u32 *buf = src;
+
+ if (CHECK_AX88796L_PORT(port))
+ maybebadio(port);
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port)) {
+ volatile u32 *p = (volatile u32 *)PCI_IOMAP(port);
+
+ while (count--)
+ *p = *buf++;
+ } else
+ maybebadio(port);
+}
+
+void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
+{
+ if (CHECK_AX88796L_PORT(port))
+ return (void __iomem *)port88796l(port, size > 1);
+ else if (PXSEG(port))
+ return (void __iomem *)port;
+ else if (CHECK_SH7780_PCIIO(port) || shifted_port(port))
+ return (void __iomem *)PCI_IOMAP(port);
+
+ return (void __iomem *)port2adr(port);
+}
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
new file mode 100644
index 000000000000..c7b9fe6e640d
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/irq.c
@@ -0,0 +1,123 @@
+/*
+ * linux/arch/sh/boards/renesas/r7780rp/irq.c
+ *
+ * Copyright (C) 2000 Kazumoto Kojima
+ *
+ * Renesas Solutions Highlander R7780RP-1 Support.
+ *
+ * Modified for R7780RP-1 by
+ * Atom Create Engineering Co., Ltd. 2002.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/r7780rp/r7780rp.h>
+
+#ifdef CONFIG_SH_R7780MP
+static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
+#else
+static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
+#endif
+
+static void enable_r7780rp_irq(unsigned int irq);
+static void disable_r7780rp_irq(unsigned int irq);
+
+/* shutdown is same as "disable" */
+#define shutdown_r7780rp_irq disable_r7780rp_irq
+
+static void ack_r7780rp_irq(unsigned int irq);
+static void end_r7780rp_irq(unsigned int irq);
+
+static unsigned int startup_r7780rp_irq(unsigned int irq)
+{
+ enable_r7780rp_irq(irq);
+ return 0; /* never anything pending */
+}
+
+static void disable_r7780rp_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short val;
+ unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
+
+ /* Set the priority in IPR to 0 */
+ local_irq_save(flags);
+ val = ctrl_inw(IRLCNTR1);
+ val &= mask;
+ ctrl_outw(val, IRLCNTR1);
+ local_irq_restore(flags);
+}
+
+static void enable_r7780rp_irq(unsigned int irq)
+{
+ unsigned long flags;
+ unsigned short val;
+ unsigned short value = (0x0001 << mask_pos[irq]);
+
+ /* Set priority in IPR back to original value */
+ local_irq_save(flags);
+ val = ctrl_inw(IRLCNTR1);
+ val |= value;
+ ctrl_outw(val, IRLCNTR1);
+ local_irq_restore(flags);
+}
+
+static void ack_r7780rp_irq(unsigned int irq)
+{
+ disable_r7780rp_irq(irq);
+}
+
+static void end_r7780rp_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ enable_r7780rp_irq(irq);
+}
+
+static struct hw_interrupt_type r7780rp_irq_type = {
+ .typename = "R7780RP-IRQ",
+ .startup = startup_r7780rp_irq,
+ .shutdown = shutdown_r7780rp_irq,
+ .enable = enable_r7780rp_irq,
+ .disable = disable_r7780rp_irq,
+ .ack = ack_r7780rp_irq,
+ .end = end_r7780rp_irq,
+};
+
+static void make_r7780rp_irq(unsigned int irq)
+{
+ disable_irq_nosync(irq);
+ irq_desc[irq].handler = &r7780rp_irq_type;
+ disable_r7780rp_irq(irq);
+}
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_r7780rp_IRQ(void)
+{
+ int i;
+
+ /* IRL0=PCI Slot #A
+ * IRL1=PCI Slot #B
+ * IRL2=PCI Slot #C
+ * IRL3=PCI Slot #D
+ * IRL4=CF Card
+ * IRL5=CF Card Insert
+ * IRL6=M66596
+ * IRL7=SD Card
+ * IRL8=Touch Panel
+ * IRL9=SCI
+ * IRL10=Serial
+ * IRL11=Extention #A
+ * IRL11=Extention #B
+ * IRL12=Debug LAN
+ * IRL13=Push Switch
+ * IRL14=ZiggBee IO
+ */
+
+ for (i=0; i<15; i++)
+ make_r7780rp_irq(i);
+}
diff --git a/arch/sh/boards/renesas/r7780rp/led.c b/arch/sh/boards/renesas/r7780rp/led.c
new file mode 100644
index 000000000000..9f02766b6f53
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/led.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) Atom Create Engineering Co., Ltd.
+ *
+ * May be copied or modified under the terms of GNU General Public
+ * License. See linux/COPYING for more information.
+ *
+ * This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <asm/io.h>
+#include <asm/r7780rp/r7780rp.h>
+
+/* Cycle the LED's in the clasic Knightriger/Sun pattern */
+void heartbeat_r7780rp(void)
+{
+ static unsigned int cnt = 0, period = 0;
+ volatile unsigned short *p = (volatile unsigned short *)PA_OBLED;
+ static unsigned bit = 0, up = 1;
+ unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7};
+
+ cnt += 1;
+ if (cnt < period)
+ return;
+
+ cnt = 0;
+
+ /* Go through the points (roughly!):
+ * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
+ */
+ period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
+
+ *p = 1 << bit_pos[bit];
+ if (up)
+ if (bit == 7) {
+ bit--;
+ up = 0;
+ } else
+ bit++;
+ else if (bit == 0)
+ up = 1;
+ else
+ bit--;
+}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
new file mode 100644
index 000000000000..0e4d5e1b541c
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -0,0 +1,164 @@
+/*
+ * arch/sh/boards/renesas/r7780rp/setup.c
+ *
+ * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
+ * Copyright (C) 2005, 2006 Paul Mundt
+ *
+ * Renesas Solutions Highlander R7780RP-1 Support.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <asm/machvec.h>
+#include <asm/r7780rp/r7780rp.h>
+#include <asm/clock.h>
+#include <asm/io.h>
+
+extern void heartbeat_r7780rp(void);
+extern void init_r7780rp_IRQ(void);
+
+/*
+ * The Machine Vector
+ */
+struct sh_machine_vector mv_r7780rp __initmv = {
+ .mv_nr_irqs = 109,
+
+ .mv_inb = r7780rp_inb,
+ .mv_inw = r7780rp_inw,
+ .mv_inl = r7780rp_inl,
+ .mv_outb = r7780rp_outb,
+ .mv_outw = r7780rp_outw,
+ .mv_outl = r7780rp_outl,
+
+ .mv_inb_p = r7780rp_inb_p,
+ .mv_inw_p = r7780rp_inw,
+ .mv_inl_p = r7780rp_inl,
+ .mv_outb_p = r7780rp_outb_p,
+ .mv_outw_p = r7780rp_outw,
+ .mv_outl_p = r7780rp_outl,
+
+ .mv_insb = r7780rp_insb,
+ .mv_insw = r7780rp_insw,
+ .mv_insl = r7780rp_insl,
+ .mv_outsb = r7780rp_outsb,
+ .mv_outsw = r7780rp_outsw,
+ .mv_outsl = r7780rp_outsl,
+
+ .mv_ioport_map = r7780rp_ioport_map,
+ .mv_init_irq = init_r7780rp_IRQ,
+#ifdef CONFIG_HEARTBEAT
+ .mv_heartbeat = heartbeat_r7780rp,
+#endif
+};
+ALIAS_MV(r7780rp)
+
+static struct resource m66596_usb_host_resources[] = {
+ [0] = {
+ .start = 0xa4800000,
+ .end = 0xa4ffffff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 6, /* irq number */
+ .end = 6,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device m66596_usb_host_device = {
+ .name = "m66596-hcd",
+ .id = 0,
+ .dev = {
+ .dma_mask = NULL, /* don't use dma */
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(m66596_usb_host_resources),
+ .resource = m66596_usb_host_resources,
+};
+
+static struct platform_device *r7780rp_devices[] __initdata = {
+ &m66596_usb_host_device,
+};
+
+static int __init r7780rp_devices_setup(void)
+{
+ return platform_add_devices(r7780rp_devices,
+ ARRAY_SIZE(r7780rp_devices));
+}
+__initcall(r7780rp_devices_setup);
+
+/*
+ * Platform specific clocks
+ */
+static void ivdr_clk_enable(struct clk *clk)
+{
+ ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL);
+}
+
+static void ivdr_clk_disable(struct clk *clk)
+{
+ ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL);
+}
+
+static struct clk_ops ivdr_clk_ops = {
+ .enable = ivdr_clk_enable,
+ .disable = ivdr_clk_disable,
+};
+
+static struct clk ivdr_clk = {
+ .name = "ivdr_clk",
+ .ops = &ivdr_clk_ops,
+};
+
+static struct clk *r7780rp_clocks[] = {
+ &ivdr_clk,
+};
+
+const char *get_system_type(void)
+{
+ return "Highlander R7780RP-1";
+}
+
+static void r7780rp_power_off(void)
+{
+#ifdef CONFIG_SH_R7780MP
+ ctrl_outw(0x0001, PA_POFF);
+#endif
+}
+
+/*
+ * Initialize the board
+ */
+void __init platform_setup(void)
+{
+ u16 ver = ctrl_inw(PA_VERREG);
+ int i;
+
+ printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n");
+
+ printk(KERN_INFO "Board version: %d (revision %d), "
+ "FPGA version: %d (revision %d)\n",
+ (ver >> 12) & 0xf, (ver >> 8) & 0xf,
+ (ver >> 4) & 0xf, ver & 0xf);
+
+ /*
+ * Enable the important clocks right away..
+ */
+ for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) {
+ struct clk *clk = r7780rp_clocks[i];
+
+ clk_register(clk);
+ clk_enable(clk);
+ }
+
+ ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */
+#ifndef CONFIG_SH_R7780MP
+ ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
+#endif
+ ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */
+
+ pm_power_off = r7780rp_power_off;
+}