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authorMartin Schwidefsky <schwidefsky@de.ibm.com>2019-02-06 18:06:03 +0100
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2019-02-07 11:57:10 +0100
commit142c52d7bce45d335f48d53fdbf428bb15cf3924 (patch)
treea098a153ac40557cd56ebdba89bfa08180c0fdbc /arch/s390
parentf8b11e089aeb63303daa0c05e4575df7075b1122 (diff)
downloadlinux-142c52d7bce45d335f48d53fdbf428bb15cf3924.tar.bz2
s390: add alignment hints to vector load and store
The z14 introduced alignment hints to increase the performance of vector loads and stores. The kernel uses an implicit alignmenet of 8 bytes for the vector registers, set the alignment hint to 3. Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/include/asm/vx-insn.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/s390/include/asm/vx-insn.h b/arch/s390/include/asm/vx-insn.h
index 266a72320e05..0c05a673811c 100644
--- a/arch/s390/include/asm/vx-insn.h
+++ b/arch/s390/include/asm/vx-insn.h
@@ -363,23 +363,23 @@
.endm
/* VECTOR LOAD MULTIPLE */
-.macro VLM vfrom, vto, disp, base
+.macro VLM vfrom, vto, disp, base, hint=3
VX_NUM v1, \vfrom
VX_NUM v3, \vto
GR_NUM b2, \base /* Base register */
.word 0xE700 | ((v1&15) << 4) | (v3&15)
.word (b2 << 12) | (\disp)
- MRXBOPC 0, 0x36, v1, v3
+ MRXBOPC \hint, 0x36, v1, v3
.endm
/* VECTOR STORE MULTIPLE */
-.macro VSTM vfrom, vto, disp, base
+.macro VSTM vfrom, vto, disp, base, hint=3
VX_NUM v1, \vfrom
VX_NUM v3, \vto
GR_NUM b2, \base /* Base register */
.word 0xE700 | ((v1&15) << 4) | (v3&15)
.word (b2 << 12) | (\disp)
- MRXBOPC 0, 0x3E, v1, v3
+ MRXBOPC \hint, 0x3E, v1, v3
.endm
/* VECTOR PERMUTE */