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| author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2017-04-19 14:54:05 +0200 |
|---|---|---|
| committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2017-07-26 08:25:23 +0200 |
| commit | 7f7e6e28cd3285ce5d5a3d88b334eda428dd7d66 (patch) | |
| tree | 4d9a8c81ee58e2b965f68322e66e894a6522f44a /arch/s390/include | |
| parent | 8351378f5873164ecc966c58fac43bab53216c94 (diff) | |
| download | linux-7f7e6e28cd3285ce5d5a3d88b334eda428dd7d66.tar.bz2 | |
s390/spinlock: add niai spinlock hints
The z14 machine introduces new mode of the next-instruction-access-intent
NIAI instruction. With NIAI-8 it is possible to pin a cache-line on a
CPU for a small amount of time, NIAI-7 releases the cache-line again.
Finally NIAI-4 can be used to prevent the CPU to speculatively access
memory beyond the compare-and-swap instruction to get the lock.
Use these instruction in the spinlock code.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include')
| -rw-r--r-- | arch/s390/include/asm/spinlock.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/s390/include/asm/spinlock.h b/arch/s390/include/asm/spinlock.h index f7838ecd83c6..339e450b0567 100644 --- a/arch/s390/include/asm/spinlock.h +++ b/arch/s390/include/asm/spinlock.h @@ -92,10 +92,11 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp) { typecheck(int, lp->lock); asm volatile( - "st %1,%0\n" - : "+Q" (lp->lock) - : "d" (0) - : "cc", "memory"); +#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES + " .long 0xb2fa0070\n" /* NIAI 7 */ +#endif + " st %1,%0\n" + : "=Q" (lp->lock) : "d" (0) : "cc", "memory"); } static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) |