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authorChristian Borntraeger <borntraeger@de.ibm.com>2014-05-26 21:55:08 +0200
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2014-05-28 10:38:59 +0200
commit993072ee67aa179c48c85eb19869804e68887d86 (patch)
treeb8d3739a32da8030ed819b14f9b14c28f7f2299a /arch/s390/include
parent6eb58d9bc113b9d3f97b710d9e5c1bc4f5044768 (diff)
downloadlinux-993072ee67aa179c48c85eb19869804e68887d86.tar.bz2
s390/lowcore: reserve 96 bytes for IRB in lowcore
The IRB might be 96 bytes if the extended-I/O-measurement facility is used. This feature is currently not used by Linux, but struct irb already has the emw defined. So let's make the irb in lowcore match the size of the internal data structure to be future proof. We also have to add a pad, to correctly align the paste. The bigger irb field also circumvents a bug in some QEMU versions that always write the emw field on test subchannel and therefore destroy the paste definitions of this CPU. Running under these QEMU version broke some timing functions in the VDSO and all users of these functions, e.g. some JREs. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Sebastian Ott <sebott@linux.vnet.ibm.com> Cc: Cornelia Huck <cornelia.huck@de.ibm.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'arch/s390/include')
-rw-r--r--arch/s390/include/asm/lowcore.h11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 26e03ce27c50..a406f24737cd 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -144,9 +144,9 @@ struct _lowcore {
__u32 spinlock_lockval; /* 0x02fc */
/* Interrupt response block */
- __u8 irb[64]; /* 0x0300 */
+ __u8 irb[96]; /* 0x0300 */
- __u8 pad_0x0340[0x0e00-0x0340]; /* 0x0340 */
+ __u8 pad_0x0360[0x0e00-0x0360]; /* 0x0360 */
/*
* 0xe00 contains the address of the IPL Parameter Information
@@ -293,12 +293,13 @@ struct _lowcore {
__u8 pad_0x03a0[0x0400-0x03a4]; /* 0x03a4 */
/* Interrupt response block. */
- __u8 irb[64]; /* 0x0400 */
+ __u8 irb[96]; /* 0x0400 */
+ __u8 pad_0x0460[0x0480-0x0460]; /* 0x0460 */
/* Per cpu primary space access list */
- __u32 paste[16]; /* 0x0440 */
+ __u32 paste[16]; /* 0x0480 */
- __u8 pad_0x0480[0x0e00-0x0480]; /* 0x0480 */
+ __u8 pad_0x04c0[0x0e00-0x04c0]; /* 0x04c0 */
/*
* 0xe00 contains the address of the IPL Parameter Information