diff options
| author | Atish Patra <atish.patra@wdc.com> | 2020-03-02 15:11:45 -0800 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2020-03-16 15:48:54 +0000 |
| commit | ccbe80bad571c2f967ad42b25bbb3ef7a4a24705 (patch) | |
| tree | 91b3c9bc120a4ef82fcbafc3f44de1a7ac8621e7 /arch/riscv | |
| parent | 2ef1cb763d92f3e212005fcf5dcc713eaf42b257 (diff) | |
| download | linux-ccbe80bad571c2f967ad42b25bbb3ef7a4a24705.tar.bz2 | |
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Currently, PLIC threshold is only initialized once in the beginning.
However, threshold can be set to disabled if a CPU is marked offline with
CPU hotplug feature. This will not allow to change the irq affinity to a
CPU that just came online.
Add PLIC specific CPU hotplug callbacks and enable the threshold when a CPU
comes online. Take this opportunity to move the external interrupt enable
code from trap init to PLIC driver as well. On cpu offline path, the driver
performs the exact opposite operations i.e. disable the interrupt and
the threshold.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20200302231146.15530-2-atish.patra@wdc.com
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/kernel/traps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index ffb3d94bf0cc..55ea614d89bf 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -157,5 +157,5 @@ void __init trap_init(void) /* Set the exception vector address */ csr_write(CSR_TVEC, &handle_exception); /* Enable interrupts */ - csr_write(CSR_IE, IE_SIE | IE_EIE); + csr_write(CSR_IE, IE_SIE); } |