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| author | Andrea Parri <andrea.parri@amarulasolutions.com> | 2018-12-01 01:01:56 +0100 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-12-21 08:10:30 -0800 |
| commit | 8b699616f399b58071cda41e5a1125d8480ac982 (patch) | |
| tree | 62b8a192e1b36974871485d85827bce00ee058b3 /arch/riscv | |
| parent | 7566ec393f4161572ba6f11ad5171fd5d59b0fbd (diff) | |
| download | linux-8b699616f399b58071cda41e5a1125d8480ac982.tar.bz2 | |
riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants
If an architecture does not define the atomic_{cmp,}xchg_*() variants,
the generic implementation defaults them to the fully-ordered version.
riscv's had its own variants since "the beginning", but it never told
(#define-d these for) the generic implementation: it is time to do so.
Signed-off-by: Andrea Parri <andrea.parri@amarulasolutions.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/include/asm/atomic.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h index c452359c9cb8..93826771b616 100644 --- a/arch/riscv/include/asm/atomic.h +++ b/arch/riscv/include/asm/atomic.h @@ -303,6 +303,15 @@ c_t atomic##prefix##_cmpxchg(atomic##prefix##_t *v, c_t o, c_t n) \ ATOMIC_OPS() +#define atomic_xchg_relaxed atomic_xchg_relaxed +#define atomic_xchg_acquire atomic_xchg_acquire +#define atomic_xchg_release atomic_xchg_release +#define atomic_xchg atomic_xchg +#define atomic_cmpxchg_relaxed atomic_cmpxchg_relaxed +#define atomic_cmpxchg_acquire atomic_cmpxchg_acquire +#define atomic_cmpxchg_release atomic_cmpxchg_release +#define atomic_cmpxchg atomic_cmpxchg + #undef ATOMIC_OPS #undef ATOMIC_OP |