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author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-10-09 13:52:14 +0000 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-10-14 18:04:09 +1100 |
commit | cbcbbf4afd6d38272bf0119d890caa5ebba6fe4c (patch) | |
tree | c1e36632154145e015b021ba51d1215fb9c7a01e /arch/powerpc | |
parent | a0da4bc166f21d88400ec91e01b815054561804e (diff) | |
download | linux-cbcbbf4afd6d38272bf0119d890caa5ebba6fe4c.tar.bz2 |
powerpc/mm: Define platform default caches related flags
Cache related flags like _PAGE_COHERENT and _PAGE_WRITETHRU
are defined on most platforms. The platforms not defining
them don't define any alternative. So we can give them a NUL
value directly for those platforms directly.
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/include/asm/nohash/32/pte-40x.h | 3 | ||||
-rw-r--r-- | arch/powerpc/include/asm/nohash/32/pte-8xx.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/pte-common.h | 11 |
3 files changed, 7 insertions, 11 deletions
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h b/arch/powerpc/include/asm/nohash/32/pte-40x.h index ab043b3e9b99..7a8b3c94592f 100644 --- a/arch/powerpc/include/asm/nohash/32/pte-40x.h +++ b/arch/powerpc/include/asm/nohash/32/pte-40x.h @@ -53,6 +53,9 @@ /* No page size encoding in the linux PTE */ #define _PAGE_PSIZE 0 +/* cache related flags non existing on 40x */ +#define _PAGE_COHERENT 0 + #define _PAGE_KERNEL_RO 0 #define _PAGE_KERNEL_ROX _PAGE_EXEC #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE) diff --git a/arch/powerpc/include/asm/nohash/32/pte-8xx.h b/arch/powerpc/include/asm/nohash/32/pte-8xx.h index b899c3c877ac..2b4669b3badb 100644 --- a/arch/powerpc/include/asm/nohash/32/pte-8xx.h +++ b/arch/powerpc/include/asm/nohash/32/pte-8xx.h @@ -46,6 +46,10 @@ #define _PAGE_NA 0x0200 /* Supervisor NA, User no access */ #define _PAGE_RO 0x0600 /* Supervisor RO, User no access */ +/* cache related flags non existing on 8xx */ +#define _PAGE_COHERENT 0 +#define _PAGE_WRITETHRU 0 + #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_RO) #define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_RO | _PAGE_EXEC) #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_DIRTY) diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h index 1a2102f8b1e7..ff01368a175a 100644 --- a/arch/powerpc/include/asm/pte-common.h +++ b/arch/powerpc/include/asm/pte-common.h @@ -1,17 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* Included from asm/pgtable-*.h only ! */ -/* - * Some bits are only used on some cpu families... Make sure that all - * the undefined gets a sensible default - */ -#ifndef _PAGE_COHERENT -#define _PAGE_COHERENT 0 -#endif -#ifndef _PAGE_WRITETHRU -#define _PAGE_WRITETHRU 0 -#endif - /* Location of the PFN in the PTE. Most 32-bit platforms use the same * as _PAGE_SHIFT here (ie, naturally aligned). * Platform who don't just pre-define the value so we don't override it here |