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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-12 13:16:52 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-12 13:16:52 -0700 |
| commit | 4ddbac98980fe0a42cf57af5d1032e024aced6a1 (patch) | |
| tree | 341d152dc1f9427d70d5b1fadafca61d22baacbb /arch/powerpc | |
| parent | 02a99ed6207e9a1d787bb360ef97de023c7edf4a (diff) | |
| parent | 018df72dd01576ab199c6129233cdeaf1409958b (diff) | |
| download | linux-4ddbac98980fe0a42cf57af5d1032e024aced6a1.tar.bz2 | |
Merge branch 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'perfcounters-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf_counter: Start documenting HAVE_PERF_COUNTERS requirements
perf_counter: Add forward/backward attribute ABI compatibility
perf record: Explicity program a default counter
perf_counter: Remove PERF_TYPE_RAW special casing
perf_counter: PERF_TYPE_HW_CACHE is a hardware counter too
powerpc, perf_counter: Fix performance counter event types
perf_counter/x86: Add a quirk for Atom processors
perf_counter tools: Remove one L1-data alias
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/kernel/power7-pmu.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c index b3f7d1216bae..b72e7a19d054 100644 --- a/arch/powerpc/kernel/power7-pmu.c +++ b/arch/powerpc/kernel/power7-pmu.c @@ -294,12 +294,12 @@ static void power7_disable_pmc(unsigned int pmc, u64 mmcr[]) } static int power7_generic_events[] = { - [PERF_COUNT_CPU_CYCLES] = 0x1e, - [PERF_COUNT_INSTRUCTIONS] = 2, - [PERF_COUNT_CACHE_REFERENCES] = 0xc880, /* LD_REF_L1_LSU */ - [PERF_COUNT_CACHE_MISSES] = 0x400f0, /* LD_MISS_L1 */ - [PERF_COUNT_BRANCH_INSTRUCTIONS] = 0x10068, /* BRU_FIN */ - [PERF_COUNT_BRANCH_MISSES] = 0x400f6, /* BR_MPRED */ + [PERF_COUNT_HW_CPU_CYCLES] = 0x1e, + [PERF_COUNT_HW_INSTRUCTIONS] = 2, + [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880, /* LD_REF_L1_LSU*/ + [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0, /* LD_MISS_L1 */ + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068, /* BRU_FIN */ + [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6, /* BR_MPRED */ }; #define C(x) PERF_COUNT_HW_CACHE_##x |