diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2013-04-24 20:33:46 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2013-04-24 20:33:54 +0200 |
| commit | 6402c7dc2a19c19bd8cdc7d80878b850da418942 (patch) | |
| tree | cda2ea2df40442e2aa016119f3548cc504127ea8 /arch/powerpc/kernel/tm.S | |
| parent | 77c675ba18836802f6b73d2d773481d06ebc0f04 (diff) | |
| parent | 60d509fa6a9c4653a86ad830e4c4b30360b23f0e (diff) | |
| download | linux-6402c7dc2a19c19bd8cdc7d80878b850da418942.tar.bz2 | |
Merge branch 'linus' into timers/core
Reason: Get upstream fixes before adding conflicting code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/powerpc/kernel/tm.S')
| -rw-r--r-- | arch/powerpc/kernel/tm.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S index 84dbace657ce..2da67e7a16d5 100644 --- a/arch/powerpc/kernel/tm.S +++ b/arch/powerpc/kernel/tm.S @@ -309,6 +309,7 @@ _GLOBAL(tm_recheckpoint) or r5, r6, r5 /* Set MSR.FP+.VSX/.VEC */ mtmsr r5 +#ifdef CONFIG_ALTIVEC /* FP and VEC registers: These are recheckpointed from thread.fpr[] * and thread.vr[] respectively. The thread.transact_fpr[] version * is more modern, and will be loaded subsequently by any FPUnavailable @@ -323,6 +324,7 @@ _GLOBAL(tm_recheckpoint) REST_32VRS(0, r5, r3) /* r5 scratch, r3 THREAD ptr */ ld r5, THREAD_VRSAVE(r3) mtspr SPRN_VRSAVE, r5 +#endif dont_restore_vec: andi. r0, r4, MSR_FP |