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author | Joakim Tjernlund <joakim.tjernlund@transmode.se> | 2009-11-20 00:21:08 +0000 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-12-09 17:10:37 +1100 |
commit | 0c4661698c58db2a9efc44f403b893bd4d98f348 (patch) | |
tree | 29fe4235a9aa51e045cc3d4056a0ecc71de48383 /arch/powerpc/include/asm/pte-8xx.h | |
parent | 4a280a413c0c0da03936483384c9e5142966635e (diff) | |
download | linux-0c4661698c58db2a9efc44f403b893bd4d98f348.tar.bz2 |
powerpc/8xx: Restore _PAGE_WRITETHRU
8xx has not had WRITETHRU due to lack of bits in the pte.
After the recent rewrite of the 8xx TLB code, there are
two bits left. Use one of them to WRITETHRU.
Perhaps use the last SW bit to PAGE_SPECIAL or PAGE_FILE?
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/pte-8xx.h')
-rw-r--r-- | arch/powerpc/include/asm/pte-8xx.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h index 68ba861331ee..d44826e4ff97 100644 --- a/arch/powerpc/include/asm/pte-8xx.h +++ b/arch/powerpc/include/asm/pte-8xx.h @@ -35,11 +35,12 @@ #define _PAGE_SPECIAL 0x0008 /* SW entry, forced to 0 by the TLB miss */ #define _PAGE_DIRTY 0x0100 /* C: page changed */ -/* These 3 software bits must be masked out when the entry is loaded - * into the TLB, 2 SW bits left. +/* These 4 software bits must be masked out when the entry is loaded + * into the TLB, 1 SW bit left(0x0080). */ #define _PAGE_GUARDED 0x0010 /* software: guarded access */ #define _PAGE_ACCESSED 0x0020 /* software: page referenced */ +#define _PAGE_WRITETHRU 0x0040 /* software: caching is write through */ /* Setting any bits in the nibble with the follow two controls will * require a TLB exception handler change. It is assumed unused bits |