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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-06 10:49:42 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-09-06 10:49:42 -0700 |
commit | 39eda2aba6be642b71f2e0ad623dcb09fd9d79cf (patch) | |
tree | cd0c8f547847641af73e38aab2478f3119dee490 /arch/powerpc/include/asm/lppaca.h | |
parent | 2e515bf096c245ba87f20ab4b4ea20f911afaeda (diff) | |
parent | 9f24b0c9ef9b6b1292579c9e2cd7ff07ddc372b7 (diff) | |
download | linux-39eda2aba6be642b71f2e0ad623dcb09fd9d79cf.tar.bz2 |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Ben Herrenschmidt:
"Here's the powerpc batch for this merge window. Some of the
highlights are:
- A bunch of endian fixes ! We don't have full LE support yet in that
release but this contains a lot of fixes all over arch/powerpc to
use the proper accessors, call the firmware with the right endian
mode, etc...
- A few updates to our "powernv" platform (non-virtualized, the one
to run KVM on), among other, support for bridging the P8 LPC bus
for UARTs, support and some EEH fixes.
- Some mpc51xx clock API cleanups in preparation for a clock API
overhaul
- A pile of cleanups of our old math emulation code, including better
support for using it to emulate optional FP instructions on
embedded chips that otherwise have a HW FPU.
- Some infrastructure in selftest, for powerpc now, but could be
generalized, initially used by some tests for our perf instruction
counting code.
- A pile of fixes for hotplug on pseries (that was seriously
bitrotting)
- The usual slew of freescale embedded updates, new boards, 64-bit
hiberation support, e6500 core PMU support, etc..."
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (146 commits)
powerpc: Correct FSCR bit definitions
powerpc/xmon: Fix printing of set of CPUs in xmon
powerpc/pseries: Move lparcfg.c to platforms/pseries
powerpc/powernv: Return secondary CPUs to firmware on kexec
powerpc/btext: Fix CONFIG_PPC_EARLY_DEBUG_BOOTX on ppc32
powerpc: Cleanup handling of the DSCR bit in the FSCR register
powerpc/pseries: Child nodes are not detached by dlpar_detach_node
powerpc/pseries: Add mising of_node_put in delete_dt_node
powerpc/pseries: Make dlpar_configure_connector parent node aware
powerpc/pseries: Do all node initialization in dlpar_parse_cc_node
powerpc/pseries: Fix parsing of initial node path in update_dt_node
powerpc/pseries: Pack update_props_workarea to map correctly to rtas buffer header
powerpc/pseries: Fix over writing of rtas return code in update_dt_node
powerpc/pseries: Fix creation of loop in device node property list
powerpc: Skip emulating & leave interrupts off for kernel program checks
powerpc: Add more exception trampolines for hypervisor exceptions
powerpc: Fix location and rename exception trampolines
powerpc: Add more trap names to xmon
powerpc/pseries: Add a warning in the case of cross-cpu VPA registration
powerpc: Update the 00-Index in Documentation/powerpc
...
Diffstat (limited to 'arch/powerpc/include/asm/lppaca.h')
-rw-r--r-- | arch/powerpc/include/asm/lppaca.h | 68 |
1 files changed, 39 insertions, 29 deletions
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index 9b12f88d4adb..4470d1e34d23 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h @@ -48,15 +48,13 @@ struct lppaca { /* cacheline 1 contains read-only data */ - u32 desc; /* Eye catcher 0xD397D781 */ - u16 size; /* Size of this struct */ - u16 reserved1; - u16 reserved2:14; - u8 shared_proc:1; /* Shared processor indicator */ - u8 secondary_thread:1; /* Secondary thread indicator */ + __be32 desc; /* Eye catcher 0xD397D781 */ + __be16 size; /* Size of this struct */ + u8 reserved1[3]; + u8 __old_status; /* Old status, including shared proc */ u8 reserved3[14]; - volatile u32 dyn_hw_node_id; /* Dynamic hardware node id */ - volatile u32 dyn_hw_proc_id; /* Dynamic hardware proc id */ + volatile __be32 dyn_hw_node_id; /* Dynamic hardware node id */ + volatile __be32 dyn_hw_proc_id; /* Dynamic hardware proc id */ u8 reserved4[56]; volatile u8 vphn_assoc_counts[8]; /* Virtual processor home node */ /* associativity change counters */ @@ -73,9 +71,9 @@ struct lppaca { u8 fpregs_in_use; u8 pmcregs_in_use; u8 reserved8[28]; - u64 wait_state_cycles; /* Wait cycles for this proc */ + __be64 wait_state_cycles; /* Wait cycles for this proc */ u8 reserved9[28]; - u16 slb_count; /* # of SLBs to maintain */ + __be16 slb_count; /* # of SLBs to maintain */ u8 idle; /* Indicate OS is idle */ u8 vmxregs_in_use; @@ -89,17 +87,17 @@ struct lppaca { * NOTE: This value will ALWAYS be zero for dedicated processors and * will NEVER be zero for shared processors (ie, initialized to a 1). */ - volatile u32 yield_count; - volatile u32 dispersion_count; /* dispatch changed physical cpu */ - volatile u64 cmo_faults; /* CMO page fault count */ - volatile u64 cmo_fault_time; /* CMO page fault time */ + volatile __be32 yield_count; + volatile __be32 dispersion_count; /* dispatch changed physical cpu */ + volatile __be64 cmo_faults; /* CMO page fault count */ + volatile __be64 cmo_fault_time; /* CMO page fault time */ u8 reserved10[104]; /* cacheline 4-5 */ - u32 page_ins; /* CMO Hint - # page ins by OS */ + __be32 page_ins; /* CMO Hint - # page ins by OS */ u8 reserved11[148]; - volatile u64 dtl_idx; /* Dispatch Trace Log head index */ + volatile __be64 dtl_idx; /* Dispatch Trace Log head index */ u8 reserved12[96]; } __attribute__((__aligned__(0x400))); @@ -108,17 +106,29 @@ extern struct lppaca lppaca[]; #define lppaca_of(cpu) (*paca[cpu].lppaca_ptr) /* + * Old kernels used a reserved bit in the VPA to determine if it was running + * in shared processor mode. New kernels look for a non zero yield count + * but KVM still needs to set the bit to keep the old stuff happy. + */ +#define LPPACA_OLD_SHARED_PROC 2 + +static inline bool lppaca_shared_proc(struct lppaca *l) +{ + return l->yield_count != 0; +} + +/* * SLB shadow buffer structure as defined in the PAPR. The save_area * contains adjacent ESID and VSID pairs for each shadowed SLB. The * ESID is stored in the lower 64bits, then the VSID. */ struct slb_shadow { - u32 persistent; /* Number of persistent SLBs */ - u32 buffer_length; /* Total shadow buffer length */ - u64 reserved; + __be32 persistent; /* Number of persistent SLBs */ + __be32 buffer_length; /* Total shadow buffer length */ + __be64 reserved; struct { - u64 esid; - u64 vsid; + __be64 esid; + __be64 vsid; } save_area[SLB_NUM_BOLTED]; } ____cacheline_aligned; @@ -130,14 +140,14 @@ extern struct slb_shadow slb_shadow[]; struct dtl_entry { u8 dispatch_reason; u8 preempt_reason; - u16 processor_id; - u32 enqueue_to_dispatch_time; - u32 ready_to_enqueue_time; - u32 waiting_to_ready_time; - u64 timebase; - u64 fault_addr; - u64 srr0; - u64 srr1; + __be16 processor_id; + __be32 enqueue_to_dispatch_time; + __be32 ready_to_enqueue_time; + __be32 waiting_to_ready_time; + __be64 timebase; + __be64 fault_addr; + __be64 srr0; + __be64 srr1; }; #define DISPATCH_LOG_BYTES 4096 /* bytes per cpu */ |