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author | Peng Ma <peng.ma@nxp.com> | 2019-09-30 02:04:40 +0000 |
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committer | Vinod Koul <vkoul@kernel.org> | 2019-10-17 09:41:07 +0530 |
commit | 7fdf9b05c73b79c4d9a85b5a9905efa10ee482a6 (patch) | |
tree | 33f44cf8f220bab06b2b733575db6f9d2e80698a /arch/parisc/Kconfig.debug | |
parent | f2835adf8afb2cea248dd10d6eb0444c34b3b51b (diff) | |
download | linux-7fdf9b05c73b79c4d9a85b5a9905efa10ee482a6.tar.bz2 |
dmaengine: fsl-dpaa2-qdma: Add NXP dpaa2 qDMA controller driver for Layerscape SoCs
DPPA2(Data Path Acceleration Architecture 2) qDMA supports
virtualized channel by allowing DMA jobs to be enqueued into
different work queues. Core can initiate a DMA transaction by
preparing a frame descriptor(FD) for each DMA job and enqueuing
this job through a hardware portal. DPAA2 components can also
prepare a FD and enqueue a DMA job through a hardware portal.
The qDMA prefetches DMA jobs through DPAA2 hardware portal. It
then schedules and dispatches to internal DMA hardware engines,
which generate read and write requests. Both qDMA source data and
destination data can be either contiguous or non-contiguous using
one or more scatter/gather tables.
The qDMA supports global bandwidth flow control where all DMA
transactions are stalled if the bandwidth threshold has been reached.
Also supported are transaction based read throttling.
Add NXP dppa2 qDMA to support some of Layerscape SoCs.
such as: LS1088A, LS208xA, LX2, etc.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Link: https://lore.kernel.org/r/20190930020440.7754-2-peng.ma@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'arch/parisc/Kconfig.debug')
0 files changed, 0 insertions, 0 deletions