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| author | Antony Pavlov <antonynpavlov@gmail.com> | 2016-03-17 06:34:16 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 14:01:45 +0200 |
| commit | f4fe969d7f43d92505b09adad2ae93ccaa453ae0 (patch) | |
| tree | faa2d939b58c82fd66aef4ce8b07ab50e8a5ff36 /arch/mips | |
| parent | 3bdf1071ba7de08c55a5cce54964ded7c0c8540d (diff) | |
| download | linux-f4fe969d7f43d92505b09adad2ae93ccaa453ae0.tar.bz2 | |
MIPS: ath79: Disable platform code for OF boards.
For OF boards we have to skip platform initialization code
so we can prove that OF code do all necessary initialization.
[ralf@linux-mips.org: Fix merge conflict.]
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12877/
Patchwork: https://patchwork.linux-mips.org/patch/12920/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/ath79/setup.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c index 01af43281bc7..7adab180e0ca 100644 --- a/arch/mips/ath79/setup.c +++ b/arch/mips/ath79/setup.c @@ -207,18 +207,20 @@ void __init plat_mem_setup(void) else if (fw_arg0 == -2) __dt_setup_arch((void *)KSEG0ADDR(fw_arg1)); - ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, - AR71XX_RESET_SIZE); - ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, - AR71XX_PLL_SIZE); - ath79_detect_sys_type(); - ath79_ddr_ctrl_init(); - if (mips_machtype != ATH79_MACH_GENERIC_OF) { + ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, + AR71XX_RESET_SIZE); + ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, + AR71XX_PLL_SIZE); + ath79_detect_sys_type(); + ath79_ddr_ctrl_init(); + detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); + /* OF machines should use the reset driver */ _machine_restart = ath79_restart; } + _machine_halt = ath79_halt; pm_power_off = ath79_halt; } |