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authorMathias Kresin <dev@kresin.me>2018-11-26 11:25:40 +0100
committerPaul Burton <paul.burton@mips.com>2018-11-26 10:19:38 -0800
commit7d35baa4e9ec4b717bc0e58a39cdb6a1c50f5465 (patch)
tree9e9812f412c4497b341884666b2e1b94d4b356ad /arch/mips/ralink
parentc50cbd85cd7027d32ac5945bb60217936b4f7eaf (diff)
downloadlinux-7d35baa4e9ec4b717bc0e58a39cdb6a1c50f5465.tar.bz2
MIPS: ralink: Fix mt7620 nd_sd pinmux
In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are configured as GPIOs. If they are blocked by the sd function, they can't be used as GPIOs. Reported-by: Kristian Evensen <kristian.evensen@gmail.com> Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux data") Patchwork: https://patchwork.linux-mips.org/patch/21220/ Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org # v3.18+
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/mt7620.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 41b71c4352c2..c1ce6f43642b 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
};
static struct rt2880_pmx_func nd_sd_grp[] = {
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
- FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
+ FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {