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authorJayachandran C <jchandra@broadcom.com>2013-12-21 16:52:15 +0530
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 22:39:47 +0100
commitd3b94285025732379df8a46c02416400c70daa85 (patch)
treec6654f3ebdf4696fdfed57191be3ec8274c482b6 /arch/mips/netlogic/common/smpboot.S
parentce59d0f7fec6fa4e7a6c484308e25bad8a6caa39 (diff)
downloadlinux-d3b94285025732379df8a46c02416400c70daa85.tar.bz2
MIPS: Netlogic: Some cleanups for assembly code
No change in logic, the changes are: * cleanup some whitespace and comments * remove confusing argument of SYS_CPU_COHERENT_BASE macro * make the numerical labels in macros consistent Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6273/
Diffstat (limited to 'arch/mips/netlogic/common/smpboot.S')
-rw-r--r--arch/mips/netlogic/common/smpboot.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S
index aa6cff0a229b..db3b8947cf46 100644
--- a/arch/mips/netlogic/common/smpboot.S
+++ b/arch/mips/netlogic/common/smpboot.S
@@ -98,7 +98,7 @@ END(nlm_boot_secondary_cpus)
* In case of RMIboot bootloader which is used on XLR boards, the CPUs
* be already woken up and waiting in bootloader code.
* This will get them out of the bootloader code and into linux. Needed
- * because the bootloader area will be taken and initialized by linux.
+ * because the bootloader area will be taken and initialized by linux.
*/
NESTED(nlm_rmiboot_preboot, 16, sp)
mfc0 t0, $15, 1 /* read ebase */
@@ -133,6 +133,7 @@ NESTED(nlm_rmiboot_preboot, 16, sp)
or t1, t2, v1 /* put in new value */
mtcr t1, t0 /* update core control */
+ /* wait for NMI to hit */
1: wait
b 1b
nop